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Double Dabble-Algorithm

This is a VHDL program for converting a binary number to a BCD (binary-coded decimal) number using the Double Dabble Algorithm.

Features & Design Purpose

Converts binary number of any desired length into the corresponding amount of BCD digits
Works well with Seven Segment Displays
Created in Xilinx Vivado for a Nexys4 DDR FPGA
Efficient, portable, and well-documented VHDL code