From b358835d0ae6ec233816363d5039007d2e2a9007 Mon Sep 17 00:00:00 2001 From: Nirmoy Das Date: Thu, 20 Nov 2025 08:10:15 -0800 Subject: [PATCH 1/2] NVIDIA: SAUCE: iommu/arm-smmu-v3: Add two more DGX Spark iGPU IDs for existing iommu quirk BugLink: https://bugs.launchpad.net/bugs/2132033 Add two more device IDs for the existing Spark iommu quirk. Link: https://bugs.launchpad.net/ubuntu/+source/linux-nvidia-6.14/+bug/2132033 Signed-off-by: Nirmoy Das Acked-by: Jamie Nguyen Acked-by: Carol L Soto Acked-by: Abdur Rahman Acked-by: Noah Wager Signed-off--by: Brad Figg (backported from commit cf6aaefd3e35565511d8328e73141a7707422109 linux-nvidia-6.17) Signed-off-by: Andrea Righi --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 2557bf561f4b..73290662ba8d 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3791,6 +3791,11 @@ static int arm_smmu_def_domain_type(struct device *dev) if (IS_HISI_PTT_DEVICE(pdev)) return IOMMU_DOMAIN_IDENTITY; + + if (pdev->vendor == PCI_VENDOR_ID_NVIDIA && + (pdev->device == 0x2E12 || pdev->device == 0x2E2A || + pdev->device == 0x2E2B)) + return IOMMU_DOMAIN_DMA; } return 0; From 9aef9944c7bbdf5f10a551b41708d9d8199603f6 Mon Sep 17 00:00:00 2001 From: Abhishek Sahu Date: Mon, 27 Apr 2026 05:04:56 +0000 Subject: [PATCH 2/2] NVIDIA: SAUCE: iommu/arm-smmu-v3: Use device ID range for DGX Spark iGPU iommu quirk BugLink: https://bugs.launchpad.net/bugs/2150487 Replace the explicit DGX Spark iGPU device ID list with a range check covering 0x2E00-0x2E3F to accommodate all possible DGX Spark iGPU PCI device IDs without requiring individual additions. The original quirk was introduced in commit ab858638d96a ("NVIDIA: SAUCE: iommu/arm-smmu-v3: Set DGX Spark iGPU default domain type to DMA") and extended with two more IDs in commit 8dc61abaa2eb ("NVIDIA: SAUCE: iommu/arm-smmu-v3: Add two more DGX Spark iGPU IDs for existing iommu quirk"). Using a range avoids further per-ID additions as new DGX Spark variants are introduced. Signed-off-by: Abhishek Sahu Acked-by: Jamie Nguyen Acked-by: Matthew R. Ochs Acked-by: Nirmoy Das Signed-off-by: Brad Figg (cherry picked from commit b406505feaa1b3820a0d08cc2689bcc53afa78c5 linux-nvidia-6.17) Signed-off-by: Andrea Righi --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 73290662ba8d..83a7f30f80e9 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3793,8 +3793,7 @@ static int arm_smmu_def_domain_type(struct device *dev) return IOMMU_DOMAIN_IDENTITY; if (pdev->vendor == PCI_VENDOR_ID_NVIDIA && - (pdev->device == 0x2E12 || pdev->device == 0x2E2A || - pdev->device == 0x2E2B)) + pdev->device >= 0x2E00 && pdev->device <= 0x2E3F) return IOMMU_DOMAIN_DMA; }