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bricks.qsf
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136 lines (134 loc) · 8.16 KB
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 12:12:29 May 16, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# bricks_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C70F672C8
set_global_assignment -name TOP_LEVEL_ENTITY bricks
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:12:29 MAY 16, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_U3 -to hs
set_location_assignment PIN_U4 -to vs
set_location_assignment PIN_U1 -to b_out[2]
set_location_assignment PIN_U2 -to b_out[1]
set_location_assignment PIN_T4 -to b_out[0]
set_location_assignment PIN_T3 -to g_out[2]
set_location_assignment PIN_T2 -to g_out[1]
set_location_assignment PIN_R5 -to g_out[0]
set_location_assignment PIN_R4 -to r_out[2]
set_location_assignment PIN_R3 -to r_out[1]
set_location_assignment PIN_R2 -to r_out[0]
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_simulation
set_location_assignment PIN_AD7 -to ps2data
set_location_assignment PIN_AD6 -to ps2clock
set_location_assignment PIN_N2 -to clk_100m
set_global_assignment -name EDA_NETLIST_WRITER_OUTPUT_DIR simulation/rom -section_id eda_simulation
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH tb -section_id eda_simulation
set_global_assignment -name EDA_TEST_BENCH_NAME tb -section_id eda_simulation
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME tentity -section_id tb
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb -section_id tb
set_global_assignment -name EDA_TEST_BENCH_FILE simulation/rom/tb.vhd -section_id tb
set_global_assignment -name VECTOR_OUTPUT_FORMAT VWF
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE "E:/Development/DLC/bricks/output_files/Waveform.vwf"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
set_global_assignment -name SMART_RECOMPILE OFF
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_location_assignment PIN_AC6 -to rst
set_location_assignment PIN_AC7 -to interface[0]
set_location_assignment PIN_AB8 -to interface[1]
set_global_assignment -name SDC_FILE bricks.sdc
set_global_assignment -name VHDL_FILE scripts/modules/bricks.vhd
set_global_assignment -name VHDL_FILE scripts/packages/interface_coding.vhd
set_global_assignment -name VHDL_FILE scripts/packages/img_coding.vhd
set_global_assignment -name VHDL_FILE scripts/packages/img_coding2v.vhd
set_global_assignment -name VHDL_FILE scripts/packages/key_coding.vhd
set_global_assignment -name VHDL_FILE scripts/packages/info.vhd
set_global_assignment -name VHDL_FILE scripts/packages/geometry.vhd
set_global_assignment -name VHDL_FILE scripts/packages/basic_settings.vhd
set_global_assignment -name VHDL_FILE scripts/modules/state_control.vhd
set_global_assignment -name VHDL_FILE scripts/modules/logic_control.vhd
set_global_assignment -name VHDL_FILE scripts/modules/buff_control.vhd
set_global_assignment -name VHDL_FILE scripts/modules/display_control.vhd
set_global_assignment -name VHDL_FILE scripts/modules/process_controller.vhd
set_global_assignment -name VHDL_FILE scripts/modules/keyboard_decoder.vhd
set_global_assignment -name VHDL_FILE scripts/rom_comp/img_reader.vhd
set_global_assignment -name VHDL_FILE scripts/rom_comp/rom_reader.vhd
set_global_assignment -name VHDL_FILE scripts/util_comp/serial_to_parallel.vhd
set_global_assignment -name VHDL_FILE scripts/util_comp/clock.vhd
set_global_assignment -name VHDL_FILE scripts/util_comp/rand_generator.vhd
set_global_assignment -name VHDL_FILE scripts/logic_control_comp/wall_collision_detection.vhd
set_global_assignment -name VHDL_FILE scripts/logic_control_comp/transfer.vhd
set_global_assignment -name VHDL_FILE scripts/logic_control_comp/reflection_computation.vhd
set_global_assignment -name VHDL_FILE scripts/logic_control_comp/plate_collision_detection.vhd
set_global_assignment -name VHDL_FILE scripts/logic_control_comp/collision_detection.vhd
set_global_assignment -name VHDL_FILE scripts/logic_control_comp/collision_computation.vhd
set_global_assignment -name VHDL_FILE scripts/buff_control_comp/card_generator.vhd
set_global_assignment -name VHDL_FILE scripts/buff_control_comp/buff_time_control.vhd
set_global_assignment -name VHDL_FILE scripts/display_control_comp/vga_control.vhd
set_global_assignment -name VHDL_FILE scripts/display_control_comp/draw_bricks.vhd
set_global_assignment -name VHDL_FILE scripts/process_comp/convert_risingedge.vhd
set_global_assignment -name VHDL_FILE scripts/keyboard_comp/KeyboardReader.vhd
set_global_assignment -name VHDL_FILE scripts/tests/test_process.vhd
set_global_assignment -name VHDL_FILE scripts/tests/logic_control_test.vhd
set_global_assignment -name VHDL_FILE scripts/tests/display_control_test.vhd
set_global_assignment -name VHDL_FILE scripts/tests/buff_test.vhd
set_global_assignment -name MIF_FILE images/mif/allimg.mif
set_global_assignment -name QIP_FILE scripts/rom_comp/rom_reader.qip
set_global_assignment -name QIP_FILE scripts/rom_comp/rom_reader_1.qip
set_global_assignment -name VECTOR_WAVEFORM_FILE output_files/Waveform.vwf
set_global_assignment -name VHDL_FILE scripts/tests/img_test.vhd
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE "signal tap/display.stp"
set_global_assignment -name SIGNALTAP_FILE "signal tap/display.stp"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name SLD_FILE "C:/Users/Wuql/Quartus/bricks/signal tap/display_auto_stripped.stp"
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top