@@ -39,17 +39,20 @@ struct envie_edid_mode envie_known_modes[NUM_KNOWN_MODES] = {
3939 .hactive = 1024 , .hback_porch = 80 , .hfront_porch = 24 , .hsync_len = 68 , .hpol = 0 ,
4040 .vactive = 768 , .vback_porch = 29 , .vfront_porch = 3 , .vsync_len = 6 , .vpol = 0 ,
4141 },
42+ //NOTE: Not supported by STM32H747: Pixel Clock > 58MHz (LTDC + DMA2D + SDRAM 16-bit, source: AN4861rev4-Table12)
4243 [EDID_MODE_1280x768_60Hz ] = {
4344 .name = "1280x768@60Hz" , .pixel_clock = 68300 , .refresh = 60 ,
4445 .hactive = 1280 , .hback_porch = 120 , .hfront_porch = 32 , .hsync_len = 20 ,
4546 .vactive = 768 , .vback_porch = 10 , .vfront_porch = 45 , .vsync_len = 12 ,
4647 },
48+ //NOTE: Not supported by STM32H747: Pixel Clock > 58MHz (LTDC + DMA2D + SDRAM 16-bit, source: AN4861rev4-Table12)
4749 [EDID_MODE_1280x720_60Hz ] = {
4850 .name = "1280x720@60Hz" , .pixel_clock = 74300 , .refresh = 60 ,
4951 .hactive = 1280 , .hback_porch = 370 , .hfront_porch = 110 , .hsync_len = 40 ,
5052 .vactive = 720 , .vback_porch = 30 , .vfront_porch = 5 , .vsync_len = 20 ,
5153 },
52- [EDID_MODE_1920x1080_60Hz ] = {
54+ //NOTE: Not supported by STM32H747: Pixel Clock > 58MHz (LTDC + DMA2D + SDRAM 16-bit, source: AN4861rev4-Table12)
55+ [EDID_MODE_1920x1080_60Hz ] = {
5356 .name = "1920x1080@60Hz" , .pixel_clock = 148500 , .refresh = 60 ,
5457 .hactive = 1920 , .hback_porch = 280 , .hfront_porch = 88 , .hsync_len = 44 ,
5558 .vactive = 1080 , .vback_porch = 45 , .vfront_porch = 4 , .vsync_len = 4 ,
@@ -91,8 +94,11 @@ enum edid_modes video_modes_get_edid(uint32_t h_check, uint32_t v_check) {
9194 }
9295 }
9396
94- if (sel_mode == -1 ) {
95- sel_mode = EDID_MODE_1920x1080_60Hz ;
97+ if (sel_mode == -1 ||
98+ sel_mode == EDID_MODE_1280x768_60Hz ||
99+ sel_mode == EDID_MODE_1280x720_60Hz ||
100+ sel_mode == EDID_MODE_1920x1080_60Hz ) {
101+ sel_mode = EDID_MODE_1024x768_60Hz ;
96102 }
97103
98104 return sel_mode ;
0 commit comments