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Perfspect updates April, 07, 2023 (#25)
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README.md

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# PerfSpect · [![Build](https://github.com/intel/PerfSpect/actions/workflows/build.yml/badge.svg)](https://github.com/intel/PerfSpect/actions/workflows/build.yml)[![License](https://img.shields.io/badge/License-BSD--3-blue)](https://github.com/intel/PerfSpect/blob/master/LICENSE)
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[Quick Start](#quick-start-requires-perf-installed) | [Requirements](#requirements) | [Build from source](#build-from-source) | [Collection](#collection) | [Post-processing](#post-processing) | [Caveats](#caveats) | [How to contribute](#how-to-contribute)
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[Quick Start](#quick-start-requires-perf-installed) | [Requirements](#requirements) | [Build from source](#build-from-source) | [Caveats](#caveats) | [How to contribute](#how-to-contribute)
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PerfSpect is a system performance characterization tool based on linux perf targeting Intel microarchitectures.
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The tool has two parts
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PerfSpect is a system performance characterization tool built on top of linux perf. It contains two parts
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1. perf collection to collect underlying PMU (Performance Monitoring Unit) counters
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2. post processing that generates csv output of performance metrics.
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perf-collect: Collects harware events
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### Quick start (requires perf installed)
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- Collection mode:
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- `sudo ./perf-collect` _default system wide_
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- `sudo ./perf-collect --socket`
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- `sudo ./perf-collect --thread`
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- `sudo ./perf-collect --pid <process-id>`
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- `sudo ./perf-collect --cid <container-id1>;<container-id2>`
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- Duration:
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- `sudo ./perf-collect` _default run until terminated_
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- `sudo ./perf-collect --timeout 10` _run for 10 seconds_
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- `sudo ./perf-collect --app "myapp.sh myparameter"` _runs for duration of another process_
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perf-postprocess: Calculates high level metrics from hardware events
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- `perf-postprocess -r results/perfstat.csv`
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## Quick start (requires perf installed)
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```
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wget -qO- https://github.com/intel/PerfSpect/releases/latest/download/perfspect.tgz | tar xvz
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sudo ./perf-postprocess -r results/perfstat.csv --html perfstat.html
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```
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### Deploy in Kubernetes
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## Deploy in Kubernetes
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Modify the template [deamonset.yml](docs/daemonset.yml) to deploy in kubernetes
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## Build from source
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Requires recent python
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Requires recent python. On successful build, binaries will be created in `dist` folder
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```
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pip3 install -r requirements.txt
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make
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```
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On successful build, binaries will be created in `dist` folder
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## Collection:
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```
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(sudo) ./perf-collect (options) -- Some options can be used only with root privileges
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usage: perf-collect [-h] [-t TIMEOUT | -a APP]
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[-p PID | -c CID | --thread | --socket] [-V] [-i INTERVAL]
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[-m MUXINTERVAL] [-o OUTCSV] [-v]
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optional arguments:
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-h, --help show this help message and exit
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-t TIMEOUT, --timeout TIMEOUT
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perf event collection time
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-a APP, --app APP Application to run with perf-collect, perf collection
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ends after workload completion
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-p PID, --pid PID perf-collect on selected PID(s)
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-c CID, --cid CID perf-collect on selected container ids
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--thread Collect for thread metrics
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--socket Collect for socket metrics
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-V, --version display version info
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-i INTERVAL, --interval INTERVAL
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interval in seconds for time series dump, default=1
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-m MUXINTERVAL, --muxinterval MUXINTERVAL
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event mux interval in milli seconds, default=0 i.e.
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will use the system default
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-o OUTCSV, --outcsv OUTCSV
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perf stat output in csv format,
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default=results/perfstat.csv
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-v, --verbose Display debugging information
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```
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### Examples
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1. sudo ./perf-collect (collect PMU counters using predefined architecture specific event file until collection is terminated)
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2. sudo ./perf-collect -a "myapp.sh myparameter" (collect perf for myapp.sh)
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3. sudo ./perf-collect --cid "one or more container IDs from docker or kubernetes seperated by semicolon"
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## Post-processing:
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```
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./perf-postprocess (options)
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usage: perf-postprocess [-h] [--version] [-m METRICFILE] [-o OUTFILE]
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[--persocket] [--percore] [-v] [--epoch] [-html HTML]
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[-r RAWFILE]
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perf-postprocess: perf post process
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optional arguments:
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-h, --help show this help message and exit
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--version, -V display version information
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-m METRICFILE, --metricfile METRICFILE
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formula file, default metric file for the architecture
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-o OUTFILE, --outfile OUTFILE
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perf stat outputs in csv format,
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default=results/metric_out.csv
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--persocket generate per socket metrics
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--percore generate per core metrics
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-v, --verbose include debugging information, keeps all intermediate
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csv files
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--epoch time series in epoch format, default is sample count
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-html HTML, --html HTML
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Static HTML report
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required arguments:
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-r RAWFILE, --rawfile RAWFILE
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Raw CSV output from perf-collect
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```
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### Examples
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./perf-postprocess -r results/perfstat.csv (post processes perfstat.csv and creates metric_out.csv, metric_out.average.csv, metric_out.raw.csv)
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./perf-postprocess -r results/perfstat.csv --html perfstat.html (creates a report for TMA analysis and system level metric charts.)
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### Notes
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1. metric_out.csv : Time series dump of the metrics. The metrics are defined in events/metric.json
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2. metric_out.averags.csv: Average of metrics over the collection period
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3. metric_out.raw.csv: csv file with raw events normalized per second
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4. Socket/core level metrics: Additonal csv files outputfile.socket.csv/outputfile.core.csv will be generated.
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## Caveats
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1. The tool can collect only the counters supported by underlying linux perf version.

_version.txt

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1.2.5
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1.2.6

events/icx.txt

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upi/event=0x2,umask=0x97,name='UNC_UPI_TxL_FLITS.NON_DATA'/,
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upi/event=0x1,umask=0x0,name='UNC_UPI_CLOCKTICKS'/;
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cha/event=0x35,umask=0xc88ffe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF'/,
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cha/event=0x35,umask=0xc80ffe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_CRD'/;
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cha/event=0x35,umask=0xc897fe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF'/,
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cha/event=0x35,umask=0xc817fe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD'/,
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cha/event=0x35,umask=0xccd7fe01,name='UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFDATA'/;
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cha/event=0x35,umask=0xC816FE01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_LOCAL'/,
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cha/event=0x35,umask=0xC8177E01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_REMOTE'/,
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cha/event=0x35,umask=0xC896FE01,name='UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PREF_LOCAL'/,

events/metric_bdx.json

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"expression": "([UNC_C_TOR_INSERTS.OPCODE.0x1c8] + [UNC_C_TOR_INSERTS.OPCODE.0x180]) * 64 / 1000000"
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},
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{
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"name": "metric_TMAM_Info_cycles_both_threads_active(%)",
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"name": "metric_TMA_Info_cycles_both_threads_active(%)",
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"expression": "100 * ( (1 - ([CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE] / ([CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY] / 2)) ) if [const_thread_count] > 1 else 0)"
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},
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{
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"name": "metric_TMAM_Info_CoreIPC",
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"name": "metric_TMA_Info_CoreIPC",
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"expression": "[instructions] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
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},
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{
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"name": "metric_TMAM_Frontend_Bound(%)",
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"name": "metric_TMA_Frontend_Bound(%)",
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"expression": "100 * [IDQ_UOPS_NOT_DELIVERED.CORE] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))"
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},
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{
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"name": "metric_TMAM_..Frontend_Latency(%)",
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"name": "metric_TMA_..Frontend_Latency(%)",
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"expression": "100 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
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},
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{
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"name": "metric_TMAM_....ICache_Misses(%)",
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"name": "metric_TMA_....ICache_Misses(%)",
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"expression": "100 * [ICACHE.IFDATA_STALL] / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....ITLB_Misses(%)",
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"name": "metric_TMA_....ITLB_Misses(%)",
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"expression": "100 * ((14 * [ITLB_MISSES.STLB_HIT]) + [ITLB_MISSES.WALK_DURATION_c1] + (7 * [ITLB_MISSES.WALK_COMPLETED] )) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....Branch_Resteers(%)",
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"name": "metric_TMA_....Branch_Resteers(%)",
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"expression": "100 * (([RS_EVENTS.EMPTY_CYCLES] - [ICACHE.IFDATA_STALL] - (14 * [ITLB_MISSES.STLB_HIT] + [ITLB_MISSES.WALK_DURATION_c1] + 7 * [ITLB_MISSES.WALK_COMPLETED])) / [RS_EVENTS.EMPTY_END]) * ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT] + [BACLEARS.ANY]) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....DSB_Switches(%)",
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"name": "metric_TMA_....DSB_Switches(%)",
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"expression": "100 * 2 * [DSB2MITE_SWITCHES.PENALTY_CYCLES] / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....MS_Switches(%)",
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"name": "metric_TMA_....MS_Switches(%)",
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"expression": "100 * 2 * [IDQ.MS_SWITCHES] / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_..Frontend_Bandwidth(%)",
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"name": "metric_TMA_..Frontend_Bandwidth(%)",
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"expression": "100 * ([IDQ_UOPS_NOT_DELIVERED.CORE] - (4 * [IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
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{
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"name": "metric_TMAM_Bad_Speculation(%)",
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"name": "metric_TMA_Bad_Speculation(%)",
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"expression": "100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + ((4 * [INT_MISC.RECOVERY_CYCLES_ANY]) / [const_thread_count])) / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) "
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},
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{
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"name": "metric_TMAM_..Branch_Mispredicts(%)",
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"name": "metric_TMA_..Branch_Mispredicts(%)",
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"expression": "([BR_MISP_RETIRED.ALL_BRANCHES] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * 100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
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},
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{
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"name": "metric_TMAM_..Machine_Clears(%)",
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"name": "metric_TMA_..Machine_Clears(%)",
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"expression": "([MACHINE_CLEARS.COUNT] / ([BR_MISP_RETIRED.ALL_BRANCHES] + [MACHINE_CLEARS.COUNT])) * 100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + (4 * [INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count])) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
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},
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{
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"name": "metric_TMAM_Backend_bound(%)",
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"name": "metric_TMA_Backend_Bound(%)",
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"expression": "100 - (100 * ([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) "
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},
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{
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"name": "metric_TMAM_..Memory_Bound(%)",
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"name": "metric_TMA_..Memory_Bound(%)",
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"expression": "100 * (1 - (([UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS]) / (4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [RESOURCE_STALLS.SB]) / ([CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ( [UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ( [RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB])"
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},
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{
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"name": "metric_TMAM_....L1_Bound(%)",
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"name": "metric_TMA_....L1_Bound(%)",
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"expression": "100 * ([CYCLE_ACTIVITY.STALLS_MEM_ANY] - [CYCLE_ACTIVITY.STALLS_L1D_MISS]) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_......DTLB_Load(%)",
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"name": "metric_TMA_......DTLB_Load(%)",
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"expression": "100 * ([DTLB_LOAD_MISSES.STLB_HIT] * 8 + [DTLB_LOAD_MISSES.WALK_DURATION_c1] + 7 * [DTLB_LOAD_MISSES.WALK_COMPLETED]) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_......Store_Fwd_Blk(%)",
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"name": "metric_TMA_......Store_Fwd_Blk(%)",
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"expression": "100 * (13 * [LD_BLOCKS.STORE_FORWARD]) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....L2_Bound(%)",
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"name": "metric_TMA_....L2_Bound(%)",
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"expression": "100 * ([CYCLE_ACTIVITY.STALLS_L1D_MISS] - [CYCLE_ACTIVITY.STALLS_L2_MISS]) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....L3_Bound(%)",
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"name": "metric_TMA_....L3_Bound(%)",
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"expression": "100 * [MEM_LOAD_UOPS_RETIRED.L3_HIT] / ([MEM_LOAD_UOPS_RETIRED.L3_HIT] + 7 * [MEM_LOAD_UOPS_RETIRED.L3_MISS]) * ([CYCLE_ACTIVITY.STALLS_L2_MISS] / [cpu-cycles])"
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},
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{
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"name": "metric_TMAM_......L3_Latency(%)",
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"name": "metric_TMA_......L3_Latency(%)",
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"expression": "100 * 41 * [MEM_LOAD_UOPS_RETIRED.L3_HIT] * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] "
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},
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{
260-
"name": "metric_TMAM_......Contested_Accesses(%)",
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"name": "metric_TMA_......Contested_Accesses(%)",
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"expression": "100 * 60 * ([MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS]) * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] "
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},
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{
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"name": "metric_TMAM_......Data_Sharing(%)",
264+
"name": "metric_TMA_......Data_Sharing(%)",
265265
"expression": "100 * 43 * [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] * ( 1 + [MEM_LOAD_UOPS_RETIRED.HIT_LFB] / ( [MEM_LOAD_UOPS_RETIRED.L2_HIT] + [MEM_LOAD_UOPS_RETIRED.L3_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM] + [MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_DRAM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_HITM] + [MEM_LOAD_UOPS_L3_MISS_RETIRED.REMOTE_FWD] ) ) / [cpu-cycles] "
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},
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{
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"name": "metric_TMAM_......SQ_Full(%)",
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"name": "metric_TMA_......SQ_Full(%)",
269269
"expression": "100 * ([OFFCORE_REQUESTS_BUFFER.SQ_FULL] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
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},
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{
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"name": "metric_TMAM_....MEM_Bound(%)",
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"name": "metric_TMA_....MEM_Bound(%)",
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"expression": "100 * (1 - ( [MEM_LOAD_UOPS_RETIRED.L3_HIT] / ([MEM_LOAD_UOPS_RETIRED.L3_HIT] + 7 * [MEM_LOAD_UOPS_RETIRED.L3_MISS])) ) * ([CYCLE_ACTIVITY.STALLS_L2_MISS] / [cpu-cycles])"
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},
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{
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"name": "metric_TMAM_......MEM_Bandwidth(%)",
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"name": "metric_TMA_......MEM_Bandwidth(%)",
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"expression": "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4], [cpu-cycles])) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_......MEM_Latency(%)",
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"name": "metric_TMA_......MEM_Latency(%)",
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"expression": "100 * (min([OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD], [cpu-cycles]) - min([OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD_c4], [cpu-cycles])) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_....Stores_Bound(%)",
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"name": "metric_TMA_....Store_Bound(%)",
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"expression": "100 * [RESOURCE_STALLS.SB] / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_......DTLB_Store(%)",
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"name": "metric_TMA_......DTLB_Store(%)",
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"expression": "100 * (7 * [DTLB_STORE_MISSES.STLB_HIT] + [DTLB_STORE_MISSES.WALK_DURATION_c1]) / [cpu-cycles]"
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},
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{
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"name": "metric_TMAM_..Core_Bound(%)",
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"name": "metric_TMA_..Core_Bound(%)",
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"expression": "100 * ( 1 - (( [UOPS_ISSUED.ANY] - [UOPS_RETIRED.RETIRE_SLOTS] + 4 * ([INT_MISC.RECOVERY_CYCLES_ANY] / [const_thread_count]) + [IDQ_UOPS_NOT_DELIVERED.CORE] + [UOPS_RETIRED.RETIRE_SLOTS] ) / ( 4 * [CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) * (1 - (([CYCLE_ACTIVITY.STALLS_MEM_ANY] + [RESOURCE_STALLS.SB]) / ([CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ( [UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ([RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB])))"
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},
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{
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"name": "metric_TMAM_....Divider(%)",
296+
"name": "metric_TMA_....Divider(%)",
297297
"expression": "100 * [ARITH.FPU_DIV_ACTIVE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
298298
},
299299
{
300-
"name": "metric_TMAM_....Ports_Utilization(%)",
300+
"name": "metric_TMA_....Ports_Utilization(%)",
301301
"expression": "100 * (( [CYCLE_ACTIVITY.STALLS_TOTAL] + [UOPS_EXECUTED.CYCLES_GE_1_UOPS_EXEC] - ([UOPS_EXECUTED.CYCLES_GE_3_UOPS_EXEC] if ([instructions] / [cpu-cycles]) > 1.8 else [UOPS_EXECUTED.CYCLES_GE_2_UOPS_EXEC]) - ([RS_EVENTS.EMPTY_CYCLES] if ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / [CPU_CLK_UNHALTED.THREAD_ANY]) > 0.1 else 0) + [RESOURCE_STALLS.SB]) - [RESOURCE_STALLS.SB] - [CYCLE_ACTIVITY.STALLS_MEM_ANY] ) /[cpu-cycles]"
302302
},
303303
{
304-
"name": "metric_TMAM_......0_Port_Utilized(%)",
304+
"name": "metric_TMA_......0_Port_Utilized(%)",
305305
"expression": "100 * (([UOPS_EXECUTED.CORE_i1_c1] / [const_thread_count]) if ([const_thread_count] > 1) else ([RS_EVENTS.EMPTY_CYCLES] if ([CYCLE_ACTIVITY.STALLS_TOTAL] - ([IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE] / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])) ) > 0.1 else 0)) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]) "
306306
},
307307
{
308-
"name": "metric_TMAM_......1_Port_Utilized(%)",
308+
"name": "metric_TMA_......1_Port_Utilized(%)",
309309
"expression": "100 * (([UOPS_EXECUTED.CORE_c1] - [UOPS_EXECUTED.CORE_c2]) / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
310310
},
311311
{
312-
"name": "metric_TMAM_......2_Port_Utilized(%)",
312+
"name": "metric_TMA_......2_Port_Utilized(%)",
313313
"expression": "100 * (([UOPS_EXECUTED.CORE_c2] - [UOPS_EXECUTED.CORE_c3]) / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
314314
},
315315
{
316-
"name": "metric_TMAM_......3m_Ports_Utilized(%)",
316+
"name": "metric_TMA_......3m_Ports_Utilized(%)",
317317
"expression": "100 * ([UOPS_EXECUTED.CORE_c3] / [const_thread_count]) / ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count])"
318318
},
319319
{
320-
"name": "metric_TMAM_Retiring(%)",
320+
"name": "metric_TMA_Retiring(%)",
321321
"expression": "100 * [UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))"
322322
},
323323
{
324-
"name": "metric_TMAM_..Base(%)",
324+
"name": "metric_TMA_..Base(%)",
325325
"expression": "100 *(([UOPS_RETIRED.RETIRE_SLOTS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))) - (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] / (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))))"
326326
},
327327
{
328-
"name": "metric_TMAM_..Microcode_Sequencer(%)",
328+
"name": "metric_TMA_..Microcode_Sequencer(%)",
329329
"expression": "100 * (([UOPS_RETIRED.RETIRE_SLOTS] / [UOPS_ISSUED.ANY]) * [IDQ.MS_UOPS] )/ (4 * ([CPU_CLK_UNHALTED.THREAD_ANY] / [const_thread_count]))"
330330
}
331331
]

events/metric_icx.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,7 @@
130130
},
131131
{
132132
"name": "metric_LLC code read MPI (demand+prefetch)",
133-
"expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_LLCPREFCODE] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF]) / [instructions]"
133+
"expression": "([UNC_CHA_TOR_INSERTS.IA_MISS_CRD] + [UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF]) / [instructions]"
134134
},
135135
{
136136
"name": "metric_LLC data read MPI (demand+prefetch)",

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