CacheController.bld

Release 13.4 ngdbuild O.87xd (lin64)
Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.

Command Line: /CMC/tools/xilinx/13.4/ISE_DS/ISE/bin/lin64/unwrapped/ngdbuild
-intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -uc CacheController.ucf -p
xc3s500e-fg320-5 CacheController.ngc CacheController.ngd

Reading NGO file
"/home/student2/nssheth/Desktop/coe758/temp/CacheController.ngc" ...
Loading design module "ipcore_dir/SRAM.ngc"...
Loading design module "ipcore_dir/icon.ngc"...
Loading design module "ipcore_dir/ila.ngc"...
Gathering constraint information from source properties...
Done.

Annotating constraints to design from ucf file "CacheController.ucf" ...
Resolving constraint associations...
Checking Constraint Associations...
WARNING:ConstraintSystem:56 - Constraint <TIMESPEC TS_J_CLK = PERIOD "J_CLK"
   30000.000000000 pS HIGH 50.000000000 %;>: Unable to find an active 'TNM' or
   'TimeGrp' constraint named 'J_CLK'.

WARNING:ConstraintSystem:56 - Constraint <TIMESPEC TS_U_TO_J = FROM "U_CLK" TO
   "J_CLK" 15000.000000000 pS;>: Unable to find an active 'TimeGrp' or 'TNM' or
   'TPSync' constraint named 'J_CLK'.

WARNING:ConstraintSystem:56 - Constraint <TIMESPEC TS_J_TO_D = FROM "J_CLK" TO
   "D_CLK" TIG;>: Unable to find an active 'TimeGrp' or 'TNM' or 'TPSync'
   constraint named 'J_CLK'.

WARNING:ConstraintSystem:56 - Constraint <TIMESPEC TS_D_TO_J = FROM "D_CLK" TO
   "J_CLK" TIG;>: Unable to find an active 'TimeGrp' or 'TNM' or 'TPSync'
   constraint named 'J_CLK'.

Done...

Checking expanded design ...

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   4

Total memory usage is 509676 kilobytes

Writing NGD file "CacheController.ngd" ...
Total REAL time to NGDBUILD completion:  3 sec
Total CPU time to NGDBUILD completion:   3 sec

Writing NGDBUILD log file "CacheController.bld"...