arch: arm64: apple: Initial t6031 (M3 Max) device tree#446
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step21 wants to merge 15 commits intoAsahiLinux:bits/001-devicetree-m3from
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arch: arm64: apple: Initial t6031 (M3 Max) device tree#446step21 wants to merge 15 commits intoAsahiLinux:bits/001-devicetree-m3from
step21 wants to merge 15 commits intoAsahiLinux:bits/001-devicetree-m3from
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One noteable difference is that M3 Max has two variants variants in t6031 and t6034. T6034 appears to be smaller design with 14 CPU cores, 30 GPU cores and 300 GB/s memory bandwidth compared to t6031 with 16 CPU cores, 40 GPU cores and 400 GB/s memory bandwidth. These are the only apparent differences between those two SoCs. Signed-off-by: Janne Grunau <j@jannau.net>
Add the following CPU cores: - apple,everest: M3 performance cores - apple,sawtooth: M3 efficiency cores Signed-off-by: Janne Grunau <j@jannau.net>
AIC version 3 as found on the Apple M3 (t8122) is very similar to AICv2 in its base functionality. It can use the same device tree bindings as AICv2 so add it to the AICv2 bindings. This interrupt controller is used on all Apple SoCs starting with M3 up to at least M5. The only apparent difference is the increased IRQ config offset. Apple's device tree codes this new offset as property of the "aic" node but the value stayed constant for all SoCs with "aic,3". Since the SoC specific compatible "apple,t8122-aic3" will be used in the driver this offset can remain a driver implementation detail. Signed-off-by: Janne Grunau <j@jannau.net>
The block on Apple M3 and M3 Pro, Max and Ultra SoCs is compatible with the existing driver so add their per-SoC compatibles. Add "apple,t8122-pmgr" for the M3 and "apple,t6030-pmgr" for M3 Pro, Max and Ultra as compatibles.
The blocks on Apple M3 and M3 Pro, Max and Ultra SoCs are compatible with the existing driver so add their per-SoC compatibles. Add "apple,t8122-pmgr-pwrstate" for the M3 and "apple,t6030-pmgr-pwrstate" for M3 Pro, Max and Ultra as compatibles.
The watchdog on Apple silicon M3 SoCs is compatible with the t8103 (M1) one. Add "apple,t8122-wdt" and "apple,t6030-wdt" as compatibles for M3 and M3 Pro, Max and Ultra. Signed-off-by: Janne Grunau <j@jannau.net>
The pin controller on Apple silicon M3 SoCs is compatible with the t8103 (M1) one. Add "apple,t8122-pinctrl" and "apple,t6030-pinctrl" as compatibles for M3 and M3 Pro, Max and Ultra. Signed-off-by: Janne Grunau <j@jannau.net>
The i2c block on Apple silicon M3 SoCs is compatible with the t8103 (M1) one. Add "apple,t8122-i2c" and "apple,t6030-i2c" as compatibles for M3 and M3 Pro, Max and Ultra. Signed-off-by: Janne Grunau <j@jannau.net>
The PWM controller on Apple silicon M3 SoCs is compatible with the t8103
(M1) one. Add "apple,t8122-pinctrl" and "apple,t6030-pinctrl" as
compatibles for M3 and M3 Pro, Max and Ultra.
Note that SoCs of the t603{0,1,2,4} family share "apple,t6030-fpwm" as
compatible where the hardware is 100% compatible, which is usually the
case in this highly related set of SoCs.
Signed-off-by: Janne Grunau <j@jannau.net>
Contains a minimal device tree for t8122-j504 (Macbook Pro (14-inch, M3, 2023)) with CPU cores, interrupt controller, power states, watchdog, serial, pin controller, i2c, PWM based keyboard LED illumination and the boot framebuffer. Signed-off-by: Janne Grunau <j@jannau.net>
Contains a minimal device tree for t6031-j514 (Macbook Pro, 14-inch, M3 Max, 2023) with cpu cores, interrupt controller, framebuffer and serial.
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
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Contains a minimal device tree for t6031-j514 (Macbook Pro, 14-inch, M3 Max, 2023) with cpu cores, interrupt controller, framebuffer and serial.