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Added subcircuits and test circuits for 12 ICs #448

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b2e53a2
Added subcircuit and test circuit for IC74HC00
SadhvikaGundubogula Jan 31, 2026
5520b3f
Added subcircuit and test circuit for IC74HC02
SadhvikaGundubogula Jan 31, 2026
3cb6a23
Added subcircuit and test circuit for IC74HC74A
SadhvikaGundubogula Jan 31, 2026
e8fd7e7
Added subcircuit and test circuit for IC74HC86
SadhvikaGundubogula Jan 31, 2026
26780c8
Added subcircuit and test circuit for IC74HC125
SadhvikaGundubogula Jan 31, 2026
8d23868
Added subcircuit and test circuit for IC74HC151
SadhvikaGundubogula Jan 31, 2026
519eb56
Added subcircuit and test circuit for IC74HC154
SadhvikaGundubogula Jan 31, 2026
510c0f4
Added subcircuit and test circuit for IC74HC175
SadhvikaGundubogula Jan 31, 2026
939f89d
Added subcircuit and test circuit for IC74HC245
SadhvikaGundubogula Jan 31, 2026
547acaa
Added subcircuit and test circuit for IC74LS83
SadhvikaGundubogula Jan 31, 2026
bf1e7a6
Added subcircuit and test circuit for ICLM567
SadhvikaGundubogula Jan 31, 2026
231594d
Added subcircuit and test circuit for ICLMV7239
SadhvikaGundubogula Jan 31, 2026
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19 changes: 19 additions & 0 deletions library/SubcircuitLibrary/IC74HC00/74HC00/74HC00.cir
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.title KiCad schematic
U9 Net-_U1-Pad5_ Net-_U13-Pad2_ d_inverter
U4 Net-_U1-Pad9_ Net-_U11-Pad1_ d_inverter
U7 Net-_U1-Pad10_ Net-_U11-Pad2_ d_inverter
U8 Net-_U1-Pad13_ Net-_U12-Pad2_ d_inverter
U5 Net-_U1-Pad12_ Net-_U12-Pad1_ d_inverter
U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ GND Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ GND PORT
U3 Net-_U1-Pad2_ Net-_U10-Pad2_ d_inverter
U2 Net-_U1-Pad1_ Net-_U10-Pad1_ d_inverter
U6 Net-_U1-Pad4_ Net-_U13-Pad1_ d_inverter
U11 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U11-Pad3_ d_nor
U12 Net-_U12-Pad1_ Net-_U12-Pad2_ Net-_U12-Pad3_ d_nor
U14 Net-_U10-Pad3_ Net-_U1-Pad3_ d_inverter
U17 Net-_U13-Pad3_ Net-_U1-Pad6_ d_inverter
U13 Net-_U13-Pad1_ Net-_U13-Pad2_ Net-_U13-Pad3_ d_nor
U10 Net-_U10-Pad1_ Net-_U10-Pad2_ Net-_U10-Pad3_ d_nor
U16 Net-_U12-Pad3_ Net-_U1-Pad11_ d_inverter
U15 Net-_U11-Pad3_ Net-_U1-Pad8_ d_inverter
.end
76 changes: 76 additions & 0 deletions library/SubcircuitLibrary/IC74HC00/74HC00/74HC00.cir.out
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.title kicad schematic

* u9 net-_u1-pad5_ net-_u13-pad2_ d_inverter
* u4 net-_u1-pad9_ net-_u11-pad1_ d_inverter
* u7 net-_u1-pad10_ net-_u11-pad2_ d_inverter
* u8 net-_u1-pad13_ net-_u12-pad2_ d_inverter
* u5 net-_u1-pad12_ net-_u12-pad1_ d_inverter
* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ gnd net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ gnd port
* u3 net-_u1-pad2_ net-_u10-pad2_ d_inverter
* u2 net-_u1-pad1_ net-_u10-pad1_ d_inverter
* u6 net-_u1-pad4_ net-_u13-pad1_ d_inverter
* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nor
* u12 net-_u12-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nor
* u14 net-_u10-pad3_ net-_u1-pad3_ d_inverter
* u17 net-_u13-pad3_ net-_u1-pad6_ d_inverter
* u13 net-_u13-pad1_ net-_u13-pad2_ net-_u13-pad3_ d_nor
* u10 net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_nor
* u16 net-_u12-pad3_ net-_u1-pad11_ d_inverter
* u15 net-_u11-pad3_ net-_u1-pad8_ d_inverter
a1 net-_u1-pad5_ net-_u13-pad2_ u9
a2 net-_u1-pad9_ net-_u11-pad1_ u4
a3 net-_u1-pad10_ net-_u11-pad2_ u7
a4 net-_u1-pad13_ net-_u12-pad2_ u8
a5 net-_u1-pad12_ net-_u12-pad1_ u5
a6 net-_u1-pad2_ net-_u10-pad2_ u3
a7 net-_u1-pad1_ net-_u10-pad1_ u2
a8 net-_u1-pad4_ net-_u13-pad1_ u6
a9 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11
a10 [net-_u12-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12
a11 net-_u10-pad3_ net-_u1-pad3_ u14
a12 net-_u13-pad3_ net-_u1-pad6_ u17
a13 [net-_u13-pad1_ net-_u13-pad2_ ] net-_u13-pad3_ u13
a14 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10
a15 net-_u12-pad3_ net-_u1-pad11_ u16
a16 net-_u11-pad3_ net-_u1-pad8_ u15
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nor, Ngspice Name: d_nor
.model u11 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nor, Ngspice Name: d_nor
.model u12 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u17 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nor, Ngspice Name: d_nor
.model u13 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nor, Ngspice Name: d_nor
.model u10 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u16 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, Ngspice Name: d_inverter
.model u15 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
.tran 0e-00 0e-00 0e-00

* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
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