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38658cd
Kicad madness
xcancerberox Jan 6, 2020
fd50c23
Remove spi watchdog erroneous connection
xcancerberox Jan 6, 2020
dff2e41
Add original mounting holes.
xcancerberox Jan 7, 2020
6ab55c8
Changes gps power supply from 3v3_pcie to general 3v3
xcancerberox Jan 7, 2020
51e1f04
Changes position of gps connector shorting uart nets
xcancerberox Jan 8, 2020
4c0051e
Changes differential pair width and separation on ethernet for compla…
xcancerberox Jan 8, 2020
0140862
Add poe input output dual circuit
xcancerberox Jan 8, 2020
f2e57b3
Add PCB routing to poe circuit
xcancerberox Jan 8, 2020
2f6afb3
Finish the ethernet rerouting adding the shielding vias
xcancerberox Jan 9, 2020
6eac632
Add hack ethernet connector
xcancerberox Jan 9, 2020
d2e9d6a
WIP General vias and traces fixing
xcancerberox Jan 9, 2020
2abda9e
replaces DC_12V Power Jack with custom footprint to fix missing holes
spiccinini Mar 11, 2020
e93ce10
fix mounting holes being 30mils lower than original gerber
spiccinini Mar 11, 2020
d9985b5
change TOP and BOTTOM clearance to 20mils
spiccinini Mar 11, 2020
cfa7702
remove ethernet fence vias
spiccinini Mar 11, 2020
168588c
remove PCIe fence vias
spiccinini Mar 11, 2020
ae536ed
add edge Silk screen to footprint C1206
spiccinini Mar 11, 2020
39b6f3a
improve placement of components silk screen and texts
spiccinini Mar 11, 2020
660d17e
fix auxiliar origin position with 30mils offset
spiccinini Mar 11, 2020
029c1eb
tstamps updated
spiccinini Mar 11, 2020
892b0da
add board name and version v1.4.0 to silkscreen
spiccinini Mar 11, 2020
0f7fcbf
add bom generator plugin
spiccinini Mar 12, 2020
0a160e1
add Bill of materials
spiccinini Mar 12, 2020
aaefc57
Fix unconnected vias
xcancerberox Mar 16, 2020
40b044e
Clean vias not wanted
xcancerberox Mar 16, 2020
eebbb20
Add GND vias under Core board
xcancerberox Mar 16, 2020
4e8fafb
Remove USB fence vias
xcancerberox Mar 16, 2020
59f01e9
Add keep out area to avoid GND pour between ethernet lanes
xcancerberox Mar 16, 2020
7c1bec5
Change bottom plane minimum width to 16mils to be equal to the Top plane
xcancerberox Mar 16, 2020
5c401fe
General changes for better conection. Track width changed. Some pours…
xcancerberox Mar 16, 2020
841cdf0
Add shield vias to differential pair top-bottom vias transition
xcancerberox Mar 16, 2020
0df9afc
Add JTAG header. SCH and routing
xcancerberox Mar 16, 2020
ed7d097
Power supplys improvements. Change feedback routing to only bottom. A…
xcancerberox Mar 17, 2020
f915127
More clearer GPIO net names
spiccinini Mar 17, 2020
0bd6313
fix pin 4 of button not connected
spiccinini Mar 17, 2020
b5d96e2
renamed net from +12V to VCC
spiccinini Mar 17, 2020
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41 changes: 22 additions & 19 deletions designs/mega_board/Core9558.sch
Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
EESchema Schematic File Version 4
LIBS:LibreRouter_MegaBoard-cache
EELAYER 30 0
EELAYER END
$Descr A3 16535 11693
Expand Down Expand Up @@ -226,14 +225,6 @@ Wire Wire Line
5000 2350 7250 2350
Wire Wire Line
7250 2350 7250 3100
Text HLabel 5000 4000 0 50 Input ~ 0
SPI_CS_L
Text HLabel 5000 4100 0 50 Input ~ 0
SPI_CLK
Text HLabel 5000 4200 0 50 Input ~ 0
SPI_MOSI
Text HLabel 5000 4300 0 50 Input ~ 0
SPI_MISO
Wire Wire Line
5000 4500 5500 4500
Wire Wire Line
Expand Down Expand Up @@ -462,14 +453,6 @@ NoConn ~ 12050 4000
NoConn ~ 12050 4100
NoConn ~ 12050 4200
NoConn ~ 12050 4300
NoConn ~ 12050 5200
NoConn ~ 12050 5100
NoConn ~ 12050 5000
NoConn ~ 12050 4900
NoConn ~ 12050 4800
NoConn ~ 12050 4700
NoConn ~ 12050 4600
NoConn ~ 12050 4500
Text HLabel 2200 1250 0 50 Input ~ 0
5V0_2GPA
NoConn ~ 5000 2350
Expand Down Expand Up @@ -719,8 +702,8 @@ $Comp
L Core9558:Core9558 U1
U 1 1 5D47B6E1
P 8600 4950
F 0 "U1" H 11591 4996 50 0000 L CNN
F 1 "CORE9558_V2" H 11591 4905 50 0000 L CNN
F 0 "U1" H 8550 5100 50 0000 L CNN
F 1 "CORE9558_V2" H 8350 4800 50 0000 L CNN
F 2 "LibreRouter_MegaBoard:DRAGINO_CORE9558" H 8600 4600 50 0001 C CNN
F 3 "DOCUMENTATION" H 8600 4700 50 0001 C CNN
F 4 "DNP" H 8600 4950 50 0001 C CNN "DNP"
Expand All @@ -732,4 +715,24 @@ Wire Wire Line
Connection ~ 7650 3000
Wire Wire Line
7650 3000 7750 3000
NoConn ~ 5000 4000
NoConn ~ 5000 4100
NoConn ~ 5000 4200
NoConn ~ 5000 4300
Text HLabel 12050 5200 2 50 Input ~ 0
S17_P0_TRX0+
Text HLabel 12050 5100 2 50 Input ~ 0
S17_P0_TRX0-
Text HLabel 12050 5000 2 50 Input ~ 0
S17_P0_TRX1+
Text HLabel 12050 4900 2 50 Input ~ 0
S17_P0_TRX1-
Text HLabel 12050 4800 2 50 Input ~ 0
S17_P0_TRX2+
Text HLabel 12050 4700 2 50 Input ~ 0
S17_P0_TRX2-
Text HLabel 12050 4600 2 50 Input ~ 0
S17_P0_TRX3+
Text HLabel 12050 4500 2 50 Input ~ 0
S17_P0_TRX3-
$EndSCHEMATC
142 changes: 126 additions & 16 deletions designs/mega_board/LibreRouter_MegaBoard-cache.lib
Original file line number Diff line number Diff line change
Expand Up @@ -177,6 +177,84 @@ X Pin_6 6 300 -100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x05_Odd_Even
#
DEF Connector_Generic_Conn_02x05_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 300 50 H V C CNN
F1 "Connector_Generic_Conn_02x05_Odd_Even" 50 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 250 150 -250 1 1 10 f
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
X Pin_1 1 -200 200 150 R 50 50 1 1 P
X Pin_10 10 300 -200 150 L 50 50 1 1 P
X Pin_2 2 300 200 150 L 50 50 1 1 P
X Pin_3 3 -200 100 150 R 50 50 1 1 P
X Pin_4 4 300 100 150 L 50 50 1 1 P
X Pin_5 5 -200 0 150 R 50 50 1 1 P
X Pin_6 6 300 0 150 L 50 50 1 1 P
X Pin_7 7 -200 -100 150 R 50 50 1 1 P
X Pin_8 8 300 -100 150 L 50 50 1 1 P
X Pin_9 9 -200 -200 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x07_Odd_Even
#
DEF Connector_Generic_Conn_02x07_Odd_Even J 0 40 Y N 1 F N
F0 "J" 50 400 50 H V C CNN
F1 "Connector_Generic_Conn_02x07_Odd_Even" 50 -400 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_2x??_*
$ENDFPLIST
DRAW
S -50 -295 0 -305 1 1 6 N
S -50 -195 0 -205 1 1 6 N
S -50 -95 0 -105 1 1 6 N
S -50 5 0 -5 1 1 6 N
S -50 105 0 95 1 1 6 N
S -50 205 0 195 1 1 6 N
S -50 305 0 295 1 1 6 N
S -50 350 150 -350 1 1 10 f
S 150 -295 100 -305 1 1 6 N
S 150 -195 100 -205 1 1 6 N
S 150 -95 100 -105 1 1 6 N
S 150 5 100 -5 1 1 6 N
S 150 105 100 95 1 1 6 N
S 150 205 100 195 1 1 6 N
S 150 305 100 295 1 1 6 N
X Pin_1 1 -200 300 150 R 50 50 1 1 P
X Pin_10 10 300 -100 150 L 50 50 1 1 P
X Pin_11 11 -200 -200 150 R 50 50 1 1 P
X Pin_12 12 300 -200 150 L 50 50 1 1 P
X Pin_13 13 -200 -300 150 R 50 50 1 1 P
X Pin_14 14 300 -300 150 L 50 50 1 1 P
X Pin_2 2 300 300 150 L 50 50 1 1 P
X Pin_3 3 -200 200 150 R 50 50 1 1 P
X Pin_4 4 300 200 150 L 50 50 1 1 P
X Pin_5 5 -200 100 150 R 50 50 1 1 P
X Pin_6 6 300 100 150 L 50 50 1 1 P
X Pin_7 7 -200 0 150 R 50 50 1 1 P
X Pin_8 8 300 0 150 L 50 50 1 1 P
X Pin_9 9 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_02x13_Odd_Even
#
DEF Connector_Generic_Conn_02x13_Odd_Even J 0 40 Y N 1 F N
Expand Down Expand Up @@ -583,6 +661,29 @@ X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# LibreRouter_MegaBoard-rescue_ATtiny13-20SSU-MCU_Microchip_ATtiny
#
DEF LibreRouter_MegaBoard-rescue_ATtiny13-20SSU-MCU_Microchip_ATtiny U 0 20 Y Y 1 F N
F0 "U" -500 550 50 H V L BNN
F1 "LibreRouter_MegaBoard-rescue_ATtiny13-20SSU-MCU_Microchip_ATtiny" 100 -550 50 H V L TNN
F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
$ENDFPLIST
DRAW
S -500 -500 500 500 0 1 10 f
X ~RESET~/PB5 1 600 -200 100 L 50 50 1 1 T
X PB3 2 600 0 100 L 50 50 1 1 T
X PB4 3 600 -100 100 L 50 50 1 1 T
X GND 4 0 -600 100 U 50 50 1 1 W
X PB0 5 600 300 100 L 50 50 1 1 T
X PB1 6 600 200 100 L 50 50 1 1 T
X PB2 7 600 100 100 L 50 50 1 1 T
X VCC 8 0 600 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# LibreRouter_MegaBoard-rescue_Crystal_GND24_Small-Device
#
DEF LibreRouter_MegaBoard-rescue_Crystal_GND24_Small-Device Y 0 40 Y N 1 F N
Expand All @@ -606,27 +707,18 @@ X 4 4 0 125 50 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# MCU_Microchip_ATtiny_ATtiny13-20SSU
# Mechanical_MountingHole
#
DEF MCU_Microchip_ATtiny_ATtiny13-20SSU U 0 20 Y Y 1 F N
F0 "U" -500 550 50 H V L BNN
F1 "MCU_Microchip_ATtiny_ATtiny13-20SSU" 100 -550 50 H V L TNN
F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 0 50 H I C CIN
DEF Mechanical_MountingHole H 0 40 Y Y 1 F N
F0 "H" 0 200 50 H V C CNN
F1 "Mechanical_MountingHole" 0 125 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS ATtiny13-20SSU ATtiny13A-SSU
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
MountingHole*
$ENDFPLIST
DRAW
S -500 -500 500 500 0 1 10 f
X ~RESET~/PB5 1 600 -200 100 L 50 50 1 1 T
X PB3 2 600 0 100 L 50 50 1 1 T
X PB4 3 600 -100 100 L 50 50 1 1 T
X GND 4 0 -600 100 U 50 50 1 1 W
X PB0 5 600 300 100 L 50 50 1 1 T
X PB1 6 600 200 100 L 50 50 1 1 T
X PB2 7 600 100 100 L 50 50 1 1 T
X VCC 8 0 600 100 D 50 50 1 1 W
C 0 0 50 0 1 50 N
ENDDRAW
ENDDEF
#
Expand Down Expand Up @@ -1039,6 +1131,24 @@ X EPAD 9 -500 -250 100 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
# Switch_SW_SPDT
#
DEF Switch_SW_SPDT SW 0 0 Y N 1 F N
F0 "SW" 0 170 50 H V C CNN
F1 "Switch_SW_SPDT" 0 -200 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C -80 0 20 0 0 0 N
C 80 -100 20 0 0 0 N
C 80 100 20 0 1 0 N
P 2 0 1 0 -60 10 65 90 N
X A 1 200 100 100 L 50 50 1 1 P
X B 2 -200 0 100 R 50 50 1 1 P
X C 3 200 -100 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# USB_HUB_FE1_1s_FE1.1s
#
DEF USB_HUB_FE1_1s_FE1.1s U 0 40 Y Y 1 F N
Expand Down
23 changes: 23 additions & 0 deletions designs/mega_board/LibreRouter_MegaBoard-rescue.lib
Original file line number Diff line number Diff line change
@@ -1,6 +1,29 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# ATtiny13-20SSU-MCU_Microchip_ATtiny
#
DEF ATtiny13-20SSU-MCU_Microchip_ATtiny U 0 20 Y Y 1 F N
F0 "U" -500 550 50 H V L BNN
F1 "ATtiny13-20SSU-MCU_Microchip_ATtiny" 100 -550 50 H V L TNN
F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 0 50 H I C CIN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
$ENDFPLIST
DRAW
S -500 -500 500 500 0 1 10 f
X ~RESET~/PB5 1 600 -200 100 L 50 50 1 1 T
X PB3 2 600 0 100 L 50 50 1 1 T
X PB4 3 600 -100 100 L 50 50 1 1 T
X GND 4 0 -600 100 U 50 50 1 1 W
X PB0 5 600 300 100 L 50 50 1 1 T
X PB1 6 600 200 100 L 50 50 1 1 T
X PB2 7 600 100 100 L 50 50 1 1 T
X VCC 8 0 600 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
# Crystal_GND24_Small-Device
#
DEF Crystal_GND24_Small-Device Y 0 40 Y N 1 F N
Expand Down
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