[linux-nvidia-6.18-next] PCI: mirror PI7C9X3G606GPC Port 4 BAR0

[nirmoy]

Summary

• Backport the PI7C9X3G606GPC Port 4 BAR0 workaround from the 6.17 PR.
• Add a PCI final/resume quirk to mirror the upstream BAR0 value into downstream Port 4 BAR0.
• Scope the WAR to the Diodes-confirmed OS-visible Tile0/P4 mapping: upstream bus + 1, device 04, function 0.
• Port 4 BAR0 may read back as zero through normal PCI config space even after a successful write, so the quirk rewrites BAR0 whenever it runs.

Validation

• Cherry-pick from the 6.17 PR applied cleanly to linux-nvidia-6.18-next.
• git show --check and git diff --check passed.
• Expected dmesg when the WAR runs:

pci 0002:a2:04.0: wrote upstream BAR 0 0x10c00000 to Port 4 BAR 0 for PI7C9X3G606GPC workaround

• The BAR value is platform/boot dependent. In the 6.17 Quark test run, Linux reassigned upstream BAR0 for 0002:a1:00.0 from 0x10300000 to 0x10c00000, then the quirk wrote 0x10c00000 to 0002:a2:04.0 Port 4 BAR0.
• pm_test=devices and pm_test=platform on the 6.17 test kernel both exercised the PCI resume path and produced the expected quirk log again after resume.
• Normal config-space readback of Port 4 BAR0 still returns 0 on this device, so setpci readback is not a valid failure signal for the WAR.
• A Diodes-provided BMC/I2C debug readback sequence returned non-zero Port 4 BAR0 bytes, 0x10 0xc0 0x00 0x00, matching 0x10c00000. That sequence uses special CPED/CDEP programming and is not a supported production validation path on this platform, so further validation should avoid it.

Fresh 6.18 package/boot validation is still pending.

References

Launchpad: https://bugs.launchpad.net/ubuntu/+source/linux-nvidia-6.17/+bug/2154457

6.17 PR: #442
BOS PR: #443
NVBug: https://nvbugspro.nvidia.com/bug/6205517
NVBug: https://nvbugspro.nvidia.com/bug/6134331

[nirmoy]

Boro review

Latest watcher review: open review

Head: 37345cd0d2e1

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