Fix direction string in ddr bandwidth metadata#57
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jvillarre merged 2 commits intoXilinx:masterfrom Apr 30, 2026
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The metadata was incorrectly calculating channel as counterNumber % 2, which gave wrong results for peak bandwidth metrics where counters 0,1 map to channel 0 and counters 2,3 map to channel 1. Added channel field to CTCounterInfo to store the correct channel from BandwidthCounterConfig and use it directly in metadata output. Before: ctr0->ch0, ctr1->ch1, ctr2->ch0, ctr3->ch1 (wrong) After: ctr0->ch0, ctr1->ch0, ctr2->ch1, ctr3->ch1 (correct) Now each channel correctly has both running and stalled events. Made-with: Cursor
The input/output direction labels were inverted. From the AIE/application perspective: - "input" = data read FROM DDR into AIE = MM2S channels - "output" = data written TO DDR from AIE = S2MM channels Fixed getPortDirection() to return correct direction based on isMaster flag (S2MM=master=output, MM2S=slave=input). Fixed getBandwidthCounterConfigs() so that: - peak_read_bandwidth uses MM2S channels (input) - peak_write_bandwidth uses S2MM channels (output) - ddr_bandwidth has MM2S as input and S2MM as output Signed-off-by: Garima Dhaked <garima.dhaked@amd.com> Made-with: Cursor
garimadhaked
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jvillarre
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Apr 30, 2026
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direction strings in metadata is wrong for read and write bandwidths.
fix is needed for peak bandwidths as well