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sb: rb: adc current leakage issue fw work around and set clk buffer U87, U88 be 1V#2683

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amithash merged 27 commits intofacebook:mainfrom
khoung76642:upcode_20260901
Mar 31, 2026
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sb: rb: adc current leakage issue fw work around and set clk buffer U87, U88 be 1V#2683
amithash merged 27 commits intofacebook:mainfrom
khoung76642:upcode_20260901

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Summary:

  • adc current leakage issue fw work around cs0(GPIO73), cs1(GPIOC1)
    -AC on
    set cs0/cs1 to be gpio output LOW (to avoid current leakage)
    -DC on
    set cs0/cs1 to be spi device cs which is used by adc
    -DC off
    set cs0/cs1 to be gpio output LOW (to avoid current leakage)
  • switch MEDHA power reporting by capping source(adc: ADC_Curr * VR_voltage, vr: VR_PWR)
  • resolved EEPROM write failures caused by back-to-back log entries occurring too rapidly
  • prevented EEPROM write failures by enforcing a 5ms guard time between log entries
  • remove cpld_polling_alert_status as the CPLD polling is now triggered by semaphore
  • add plat_pldm_vr_update() wrapper for VR PLDM FW update
  • validate component version string against detected VR sensor type (mp29816a/mp2971/raa228249)
  • reject mismatched VR firmware to prevent flashing the wrong image
  • Change IRIS_OWL_W_TRVDD0P75 and IRIS_OWL_E_TRVDD0P75 event order to match bmc event definitions
  • Update LED heartbeat to reflect system fault state
  • add when dc on clk buffer U87, U88 amplitude setting will be 1V
  • add showing adc voltage data when power capping source is setting from adc
  • modified it will set VR setting back to normal mode if system in vr test mode when dc off
  • fix power_sequence_event_pwrgd_table info, cpld reg:0xC1 data
  • remove unused wrn message
  • add read status words in black box if power sequence error has sensor to read
  • modified bootstrap default pin setting
    -For all boards
    -HAMSA_MFIO7 = 0
    -HAMSA_MFIO9 = 1
    -MEDHA0_CHIP_STRAP_1 = 0
    -MEDHA1_CHIP_STRAP_1 = 0
    -For Rainbow <=fab 2
    -HAMSA_LS_STRAP_0 = 0x1
    -MEDHA0_CHIP_STRAP_0 = 0x1
    -MEDHA1_CHIP_STRAP_0 = 0x1
    -For Rainbow >=fab 3
    -HAMSA_LS_STRAP_0 = 0x0
    -MEDHA0_CHIP_STRAP_0 = 0x0
    -MEDHA1_CHIP_STRAP_0 = 0x0
  • fix shell command "voltage_range" show VR name error
  • fix boot1 read version pointer issue
  • resize vr_vout_range_user_settings_struct array to match actual VR count
  • modified i2c_target_read can set timeout(for multi i2c target reading)
  • update reading position for ASIC version data
  • enable MEDHA0/1 i2c target and set HAMSA, MEDHA0/1 i2c freq. to 100KHz
  • optimize power capping assert time
  • modified bootstrap default value
    -HAMSA_MFIO7 = 0
    -HAMSA_MFIO9 = 1
    -MEDHA0_CHIP_STRAP_1 = 0
    -MEDHA1_CHIP_STRAP_1 = 0
  • modified SMB asic bus freq. from 400KHz to 100KHz
  • change vr pldm fw get will check 3v3 and 5v pwrgd instead of iris power on gpio

Test Plan:

  • Build code: Pass

adamHSU and others added 27 commits March 11, 2026 15:20
Summary:
- Fix shell command "voltage_range" show VR name error
Test Plan
- Build code: Pass
Summary:
- fix boot1 read version pointer issue

Test Plan:
- Build code: Pass
Summary:
- Fix clang-format for release
Test Plan:
- Build code: Pass
Summary:
- Resize vr_vout_range_user_settings_struct array to match actual VR count
Test Plan
- Build code: Pass
… setting

Summary:
- modified default bootstrap pin setting
	-EVT:
		HAMSA_LS_STRAP 1
		MEDHA0_CHIP_STRAP_0 1
		MEDHA1_CHIP_STRAP_0 1

	->= DVT:
		HAMSA_LS_STRAP 0
		MEDHA0_CHIP_STRAP_0 0
		MEDHA1_CHIP_STRAP_0 0
- update reading position for ASIC version data
- Enable MEDHA0/1 i2c target and set HAMSA, MEDHA0/1 i2c freq. to 100KHz

Test Plan:
- Build code: Pass
Summary:
- Remove default bootstrap setting
	-EVT:
		HAMSA_LS_STRAP 1
		MEDHA0_CHIP_STRAP_0 1
		MEDHA1_CHIP_STRAP_0 1

	->= DVT:
		HAMSA_LS_STRAP 0
		MEDHA0_CHIP_STRAP_0 0
		MEDHA1_CHIP_STRAP_0 0
- Add bootstrap default value
	-HAMSA_MFIO7 = 0
	-HAMSA_MFIO9 = 1
	-MEDHA0_CHIP_STRAP_1 = 0
	-MEDHA1_CHIP_STRAP_1 = 0
- Modified platform info to show i2c bus MEADHA0/1 Enable
- Optimize the "i2c_target_read" function by using a wrapper.

Test Plan:
- Build code: Pass
Summary:
- optimize power capping assert time

Test Plan:
- Build code: Pass
- Test with power capping function
Summary:
- Version commit for sb-rb-20260601

Test Plan:
Build code: Pass
Check BIC version: Pass
…s sensor to read

Summary:
- add read status words in black box if power sequence error has sensor to read

Test Plan:
- Build code: Pass
Summary:
- modified bootstrap default pin setting
	-For all boards
		-HAMSA_MFIO7 = 0
		-HAMSA_MFIO9 = 1
		-MEDHA0_CHIP_STRAP_1 = 0
		-MEDHA1_CHIP_STRAP_1 = 0
	-For Rainbow <=fab 2
		-HAMSA_LS_STRAP_0 = 0x1
		-MEDHA0_CHIP_STRAP_0 = 0x1
		-MEDHA1_CHIP_STRAP_0 = 0x1
	-For Rainbow >=fab 3
		-HAMSA_LS_STRAP_0 = 0x0
		-MEDHA0_CHIP_STRAP_0 = 0x0
		-MEDHA1_CHIP_STRAP_0 = 0x0

Test Plan:
- Build code: Pass
Summary:
- Version commit for sb-rb-20260801

Test Plan:
Build code: Pass
Check BIC version: Pass
Summary:
- Remove cpld_polling_alert_status as the CPLD polling is now triggered
  by semaphore.
Test Plan:
- Build code: Pass
Summary:
- Add plat_pldm_vr_update() wrapper for VR PLDM FW update
- Validate component version string against detected VR sensor type (mp29816a/mp2971/raa228249)
- Reject mismatched VR firmware to prevent flashing the wrong image
Test Plan:
- Build code: Pass
- Function check: Pass
Summary:
- Use ADC instant MEDHA0/MEDHA1 power when power capping source is ADC
- Keep using VR sensor cached power when source is VR
- Apply the source-based selection to VR power buffer and MEDHA_SENSOR_VALUE_REG readback
- Support both ADS7066 and AD4058 as ADC sources for MEDHA power
- Rename adc_raw_mv_to_apms() to adc_raw_v_to_apms() for clarity
Test Plan:
- Build code: Pass
- Function check: Pass
Summary:
- Change IRIS_OWL_W_TRVDD0P75 and IRIS_OWL_E_TRVDD0P75 event order to
match bmc event definitions
- Update LED heartbeat to reflect system fault state
Test Plan:
- Build code: Pass
Summary:
- Resolved EEPROM write failures caused by back-to-back log entries occurring too rapidly.
- Prevented EEPROM write failures by enforcing a 5ms guard time between log entries.

Test Plan:
- Build code: Pass
Summary:
- Fix clang-format below these files.
meta-facebook/sb-rb/src/platform/plat_adc.c
meta-facebook/sb-rb/src/platform/plat_i2c_target.c
meta-facebook/sb-rb/src/platform/plat_led.c
meta-facebook/sb-rb/src/platform/plat_pldm_fw_update.c
Test Plan:
-Build code: Pass
…bugs

Summary:
- add when dc on clk buffer U87, U88 amplitude setting will be 1V
- add showing adc voltage data when power capping source is setting from adc
- modified it will set VR setting back to normal mode if system in vr test mode when dc off
- fix power_sequence_event_pwrgd_table info, cpld reg:0xC1 data

Test Plan:
- Build code: Pass
Summary:
- Replace ADC power voltage input from ads7066_val_*/ad4058_val_* to inst_medha0/inst_medha1 (cached VDD rail voltage)
- Keep using ADC raw values to convert current and compute MEDHA instant power
- Support both ADS7066 and AD4058 paths

Test Plan:
- Build code: Pass
- Function chech: Pass
Summary:
- Version commit for sb-rb-20260901

Test Plan:
Build code: Pass
Check BIC version: Pass
@meta-cla meta-cla Bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Mar 11, 2026
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meta-codesync Bot commented Mar 11, 2026

@facebook-github-bot has imported this pull request. If you are a Meta employee, you can view this in D96099006. (Because this pull request was imported automatically, there will not be any future comments.)

@amithash amithash merged commit fd835d2 into facebook:main Mar 31, 2026
24 checks passed
@khoung76642 khoung76642 deleted the upcode_20260901 branch April 8, 2026 19:08
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5 participants