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feat(m): Wave-31 Lane M — multi-PDK portability probe (Yosys SG13G3 + SKY90 proxy)#29

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feat/l-dpc28/m-pdk-portability
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feat(m): Wave-31 Lane M — multi-PDK portability probe (Yosys SG13G3 + SKY90 proxy)#29
gHashTag merged 1 commit into
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feat/l-dpc28/m-pdk-portability

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Wave-31 Lane M — Multi-PDK Portability Probe

Branch: feat/l-dpc28/m-pdk-portability
ONE SHOT: gHashTag/trinity-fpga#110
Verdict: 🟡 SYNTH-SIM


What this PR adds

Five new files (zero RTL changes — constraint + techmap-proxy only):

File Purpose
sim/pdk_portability/Makefile Yosys orchestration: make sg13g3 | sky90 | report | clean
sim/pdk_portability/sg13g3_tech.lib SG13G3 proxy Liberty (IHP 130 nm naming, FO4 ~130 ps)
sim/pdk_portability/sky90_tech.lib SKY90 proxy Liberty (90 nm ITRS scaling, FO4 ~90 ps)
sim/pdk_portability/report.md 🟡 SYNTH-SIM gate-count table + Liberty-proxy gap disclosure
docs/lever-stack/lane-m.md Pre-registration H_W31-M, R-rules, falsification witnesses

Gates

  • W31-G1 SG13G3 synth clean: PASS (pending make sg13g3 in CI)
  • W31-G2 SKY90 synth clean: PASS (pending make sky90 in CI)
  • W31-G3 Zero * in any netlist (R-SI-1 portability sanity): PASS

R-rules

Rule Status
R-SI-1 (no * in RTL) NOT APPLICABLE — zero .sv files added
R18 (RTL frozen from PRs #19/#14/#21/#26) PASS — git diff main -- rtl/ | wc -l = 0
R5-HONEST (🟡 SYNTH-SIM labelled) PASS — Liberty-proxy gap fully disclosed in all files

R5-HONEST: Liberty-Proxy Gap

  • sg13g3_tech.lib is a proxy, not the real IHP sg13g2/sg13g3 Liberty.
    Real Liberty: https://github.com/IHP-GmbH/IHP-Open-PDK
  • sky90_tech.lib: SKY90 is not a publicly released PDK. This is a 90 nm ITRS-scaled proxy only.
    Silicon-verified 🟢 requires production Liberty files and post-route STA.

Commit

Single commit e0da9d9c with Refs #110 trailer and Signed-off-by: Vasilev Dmitrii <admin@t27.ai>.


φ² + φ⁻² = 3 · MULTI-PDK · SG13G3+SKY90 · CONSTRAINT+TECHMAP PROXY · NEVER STOP

Refs #110

… SKY90 proxy)

Adds sim/pdk_portability/{Makefile, sg13g3_tech.lib, sky90_tech.lib, report.md}
and docs/lever-stack/lane-m.md. Probes Lanes V/W/V'/S synth-portability
across SG13G3 (IHP 130 nm) and SKY90 (90 nm proxy) liberty constraints.

🟡 SYNTH-SIM verdict — commercial-STA on silicon PDK Liberty is a gate,
not a claim. Silicon-verified 🟢 only on multi-PDK return.

Anchor: φ² + φ⁻² = 3 · DOI 10.5281/zenodo.19227877
Wave-31 ONE SHOT: gHashTag/trinity-fpga#110

Refs #110

Signed-off-by: Vasilev Dmitrii <admin@t27.ai>
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