[rstmgr,dv] Reset Manager DV ported to mocha#506
[rstmgr,dv] Reset Manager DV ported to mocha#506KolosKoblasz-Semify wants to merge 4 commits intolowRISC:mainfrom
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| - files_rtl | ||
| - files_dv | ||
| default_tool: vcs | ||
| default_tool: xcelium |
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This is the source of your issue with the src file being not generated. The .src file is your file list generated from FuseSoc. I know that confusing, I went into this trap earlier too.
The VCS backend generates a .scr file, which is an identical format to a more standard .f format. We are only running FuseSoc up to the point it generates the filelist file (.scr in this case).
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* open titan specific paths changed to mocha specific ones in the template files * 0001_Fix_Paths_And_Tools.patch file created with the changes Signed-off-by: Kolos Koblasz <kolos.koblasz@semify-eda.com>
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* 0002 patches fix the auto generated reset manager's dv files to be run Signed-off-by: Kolos Koblasz <kolos.koblasz@semify-eda.com>
* Reset Manager DV paths fixed * Template files fixed to enable running block level simulations Signed-off-by: Kolos Koblasz <kolos.koblasz@semify-eda.com>
* Since templates files were chnaged to enable running block level simulations the rstmgr files had to be regenerated and commited. Signed-off-by: Kolos Koblasz <kolos.koblasz@semify-eda.com>
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| // Wait till rst_lc_n is inactive for non-aon. | ||
| `DV_WAIT(cfg.rstmgr_vif.resets_o.rst_lc_n[1]) | ||
| // Wait till rst_por_aon_n is inactive for non-aon. | ||
| `DV_WAIT(cfg.rstmgr_vif.resets_o.rst_por_aon_n[1]) |
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I think this should be the same reset as the one fed into the reset manager block in the top which is rst_por_io_n
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Probably makes sense to switch rst_*lc* with rst_por_io_n everywhere (and Marno agrees as well).
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Okay, but then it is DomainAonSel right?
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rst_lc_n[1] -> rst_por_io_n[1] so this is going to be Domain0Sel?
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Yes, DomainAonSel is 0, Domain0Sel is 1.


TO DO
This PR will address: #433