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interrupt_processing was measuring the same trap-plus-ISR-thread path
interrupt_preemption_processing already exercises. Introduce
tm_cause_interrupt_sync() so that test measures only the cost of the
ISR body plus the semaphore handshake, and route interrupt_processing
through the new entry.
Each port supplies both primitives:
tm_cause_interrupt() trap/IRQ-pend/ISR-thread path (unchanged)
tm_cause_interrupt_sync() inline tm_interrupt_handler() on the
caller's stack
FreeRTOS Cortex-M brackets the inline call with cpsid i/cpsie i and sets
a benchmark-only flag so tm_{thread_resume,semaphore_put} take the
FromISR path during the handler -- functionally safe under PRIMASK, no
real ISR or context switch can race. ThreadX Cortex-M emulates an ISR
preamble (system_state++ / preempt_disable++) under cpsid i and defers
any handler-driven preemption to tm_threadx_benchmark_sync_complete()
after cpsie i, mirroring real ISR semantics. POSIX hosts call the
handler directly: their semaphore and resume APIs are mutex-guarded and
safe from thread context.
Thread-Metric Benchmark Results✅ All tests passed — Summary
Per-Test Results
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interrupt_processing was measuring the same trap-plus-ISR-thread path interrupt_preemption_processing already exercises. Introduce tm_cause_interrupt_sync() so that test measures only the cost of the ISR body plus the semaphore handshake, and route interrupt_processing through the new entry.
Each port supplies both primitives:
tm_cause_interrupt() trap/IRQ-pend/ISR-thread path (unchanged)
tm_cause_interrupt_sync() inline tm_interrupt_handler() on the
caller's stack
FreeRTOS Cortex-M brackets the inline call with cpsid i/cpsie i and sets a benchmark-only flag so tm_{thread_resume,semaphore_put} take the FromISR path during the handler -- functionally safe under PRIMASK, no real ISR or context switch can race. ThreadX Cortex-M emulates an ISR preamble (system_state++ / preempt_disable++) under cpsid i and defers any handler-driven preemption to tm_threadx_benchmark_sync_complete() after cpsie i, mirroring real ISR semantics. POSIX hosts call the handler directly: their semaphore and resume APIs are mutex-guarded and safe from thread context.
Summary by cubic
Add
tm_cause_interrupt_sync()to run the interrupt handler in-line and remove trap/ISR-thread overhead frominterrupt_processing. This separates the two interrupt benchmarks and improves measurement accuracy.New Features
tm_cause_interrupt_sync()intm_api.hand documented it in README;tm_cause_interrupt()remains for the real IRQ/trap path.interrupt_processing.cto usetm_cause_interrupt_sync()so it measures only the ISR body plus the semaphore handshake.tm_thread_resume/tm_semaphore_puttake the FromISR path safely; ThreadX Cortex‑M emulates ISR preamble and defers preemption viatm_threadx_benchmark_sync_complete(); POSIX calls the handler directly.Migration
tm_cause_interrupt()andtm_cause_interrupt_sync(); if no safe inline path exists, alias the sync variant to the async one.Written for commit 2696506. Summary will update on new commits.