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AMD SOF stack fixes and improvements related to IPC flags #5642

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AMD SOF stack fixes and improvements related to IPC flags #5642

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3416de3
ASoC: SOF: amd: fix for ipc flags check
vijendarmukunda Oct 22, 2025
cbd4f90
ASoC: SOF: amd: set ipc flags to zero
vijendarmukunda Oct 22, 2025
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4 changes: 2 additions & 2 deletions sound/soc/sof/amd/acp-ipc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -181,14 +181,14 @@ irqreturn_t acp_sof_ipc_irq_thread(int irq, void *context)
}

dsp_msg = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_msg_write);
if (dsp_msg) {
if (dsp_msg == 1) {
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@bardliao bardliao Jan 12, 2026

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What does 1 mean? Can we use a #define or add some comment here and line 191?

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@vijendarmukunda vijendarmukunda Jan 12, 2026

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dsp_msg flag is set to 1 by Firmware when sends an IPC. Similarly dsp_ack will be set to 1 by firmware when it responds to host IPC message. Will use macros for the same

snd_sof_ipc_msgs_rx(sdev);
acp_dsp_ipc_host_done(sdev);
ipc_irq = true;
}

dsp_ack = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_ack_write);
if (dsp_ack) {
if (dsp_ack == 1) {
if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) {
guard(spinlock_irq)(&sdev->ipc_lock);

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28 changes: 28 additions & 0 deletions sound/soc/sof/amd/acp.c
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Original file line number Diff line number Diff line change
Expand Up @@ -377,13 +377,41 @@ void memcpy_to_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *src,
snd_sof_dsp_write(sdev, ACP_DSP_BAR, reg_offset + i, src[j]);
}

static int acp_init_scratch_mem_ipc_flags(struct snd_sof_dev *sdev)
{
u32 dsp_msg_write, dsp_ack_write, host_msg_write, host_ack_write;

dsp_msg_write = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_dsp_msg_write);
dsp_ack_write = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_dsp_ack_write);
host_msg_write = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_host_msg_write);
host_ack_write = sdev->debug_box.offset +
offsetof(struct scratch_ipc_conf, sof_host_ack_write);
/* Initialize host message write flag */
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + host_msg_write, 0);

/* Initialize host ack write flag */
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + host_ack_write, 0);

/* Initialize DSP message write flag */
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_msg_write, 0);

/* Initialize DSP ack write flag */
snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SCRATCH_REG_0 + dsp_ack_write, 0);

return 0;
}

static int acp_memory_init(struct snd_sof_dev *sdev)
{
struct acp_dev_data *adata = sdev->pdata->hw_pdata;
const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata);

snd_sof_dsp_update_bits(sdev, ACP_DSP_BAR, desc->dsp_intr_base + DSP_SW_INTR_CNTL_OFFSET,
ACP_DSP_INTR_EN_MASK, ACP_DSP_INTR_EN_MASK);
acp_init_scratch_mem_ipc_flags(sdev);
init_dma_descriptor(adata);

return 0;
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