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6acdfd5
minor
xuchang-vivo Jan 26, 2026
172e8b5
minor
xuchang-vivo Jan 27, 2026
9e6e07b
minor
xuchang-vivo Jan 30, 2026
2f7b0af
minor
xuchang-vivo Feb 2, 2026
36b9af1
laji
xuchang-vivo Feb 11, 2026
56cc513
wip
xuchang-vivo Feb 12, 2026
2f71fac
minor
xuchang-vivo Feb 12, 2026
0d05786
add intr
xuchang-vivo Feb 24, 2026
a36acfc
minor
xuchang-vivo Feb 24, 2026
755837d
minor
xuchang-vivo Feb 24, 2026
432023f
minor
xuchang-vivo Feb 24, 2026
c01a162
minor
xuchang-vivo Feb 24, 2026
8f0bf26
del idf deps
xuchang-vivo Feb 24, 2026
ac01382
add riscv kconfig
xuchang-vivo Feb 25, 2026
1a25367
set mie
xuchang-vivo Feb 25, 2026
a765702
minor
xuchang-vivo Feb 25, 2026
3f5ec16
minor
xuchang-vivo Feb 25, 2026
af1b8ba
minor
xuchang-vivo Feb 25, 2026
38f486a
minor
xuchang-vivo Feb 25, 2026
cd0d3c1
minor
xuchang-vivo Feb 25, 2026
a4a01c3
minor
xuchang-vivo Feb 25, 2026
6cbaacb
minor
xuchang-vivo Feb 25, 2026
f91cc18
minor
xuchang-vivo Feb 25, 2026
d6dd799
minor
xuchang-vivo Feb 25, 2026
e4b5401
make fifo tx enable
xuchang-vivo Feb 25, 2026
5a7e627
disable wdt
xuchang-vivo Feb 25, 2026
9607f68
add intc
xuchang-vivo Feb 26, 2026
182b422
minor
xuchang-vivo Feb 26, 2026
8259b52
add copyright
xuchang-vivo Feb 27, 2026
f534098
add link.x
xuchang-vivo Feb 27, 2026
f410546
make mtime optional
xuchang-vivo Feb 27, 2026
85309b6
minor
xuchang-vivo Feb 27, 2026
fbd885f
Apply suggestion from @lawkai-vivo
lawkai-vivo Feb 27, 2026
4765dc2
Update kconfig/config/seeed_xiao_esp32c3/debug/defconfig
lawkai-vivo Feb 27, 2026
e7b958b
Update driver/src/systimer/esp32_sys_timer.rs
xuchang-vivo Feb 28, 2026
75a05a9
Update driver/src/systimer/esp32_sys_timer.rs
xuchang-vivo Feb 28, 2026
b15a20b
add unittest_kernel
xuchang-vivo Feb 28, 2026
3f5616f
fix bug
xuchang-vivo Feb 28, 2026
e378194
set unittest thread num options
xuchang-vivo Mar 2, 2026
542501f
fix
xuchang-vivo Mar 4, 2026
c60e865
minor
xuchang-vivo Mar 4, 2026
dca99cf
add check_all
xuchang-vivo Mar 6, 2026
92b317a
del kconfig.test
xuchang-vivo Mar 6, 2026
299c405
fix compile error
xuchang-vivo Mar 6, 2026
72d0a14
minor
xuchang-vivo Mar 6, 2026
04a7516
minor
xuchang-vivo Mar 6, 2026
9afb0a0
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
5b29bf4
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
18de384
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
49ab813
Update driver/src/interrupt_controller/esp32_intc.rs
xuchang-vivo Mar 6, 2026
fc9dc85
fix
xuchang-vivo Mar 6, 2026
bd59638
add compensation
xuchang-vivo Mar 9, 2026
447dfe2
minor
xuchang-vivo Mar 9, 2026
b05f556
minor
xuchang-vivo Mar 10, 2026
2778b01
minor
xuchang-vivo Mar 11, 2026
c4c69cc
add compensation
xuchang-vivo Mar 11, 2026
7587ca1
minor
xuchang-vivo Mar 13, 2026
4bdef13
minor
xuchang-vivo Mar 13, 2026
6ab2426
add gen_esp32_qemu_runner
xuchang-vivo Mar 23, 2026
d51179f
fix typo
xuchang-vivo Mar 24, 2026
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8 changes: 7 additions & 1 deletion arch/riscv/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -19,5 +19,11 @@ config HAS_MIE
default n
help
Whether the platform supports the MIE.


config HAS_MTIME
bool "MTIME supports"
default n
help
Whether the platform supports the MTIME.

endmenu
84 changes: 84 additions & 0 deletions driver/src/interrupt_controller/esp32_intc.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,84 @@
// Copyright (c) 2026 vivo Mobile Communication Co., Ltd.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

use tock_registers::{
interfaces::{ReadWriteable, Readable, Writeable},
register_bitfields, register_structs,
registers::ReadWrite,
};

use crate::{
interrupt_controller::Interrupt, static_ref::StaticRef,
uart::esp32_usb_serial::JFIFO_ST_REG::OUT_FIFO_FULL,
};

register_structs! {
pub IntcRegisters {
(0x000 => _reserved0),
(0x104 => cpu_int_enable_reg: ReadWrite<u32>),
(0x108 => _reserved1),
(0x118 => priority_reg: [ReadWrite<u32, PRIORITY_REG::Register>; 31]),
(0x194 => threshold_reg: ReadWrite<u32, THRESHOLD_REG::Register>),
(0x198 => @END),
}
}

register_bitfields! [
u32,

pub PRIORITY_REG [
PRIORITY OFFSET(0) NUMBITS(4) [],
],

pub THRESHOLD_REG [
THRESHOLD OFFSET(0) NUMBITS(4) [],
],
];

pub struct Esp32Intc {
registers: StaticRef<IntcRegisters>,
}

impl Esp32Intc {
pub const fn new(base: usize) -> Self {
Self {
registers: unsafe { StaticRef::new(base as *const IntcRegisters) },
}
}

pub fn allocate_irq(&self, irq: Interrupt) {
let mut map_reg =
self.registers.inner() as *const IntcRegisters as usize + irq.source_no * 4;
unsafe {
core::ptr::write_volatile(map_reg as *mut u32, irq.irq_no as u32);
}
}

pub fn enable_irq(&self, irq: Interrupt) {
let mut enable_reg = self.registers.cpu_int_enable_reg.get();
enable_reg |= 1 << irq.irq_no;
self.registers.cpu_int_enable_reg.set(enable_reg);
}

pub fn set_priority(&self, irq: Interrupt, priority: u8) {
self.registers.priority_reg[(irq.irq_no - 1) as usize]
.write(PRIORITY_REG::PRIORITY.val(priority as u32));
}

pub fn set_threshold(&self, threshold: u8) {
self.registers
.threshold_reg
.write(THRESHOLD_REG::THRESHOLD.val(threshold as u32));
}
}
27 changes: 27 additions & 0 deletions driver/src/interrupt_controller/mod.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
// Copyright (c) 2026 vivo Mobile Communication Co., Ltd.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

#[cfg(target_chip = "esp32c3")]
Comment thread
xuchang-vivo marked this conversation as resolved.
pub mod esp32_intc;

pub struct Interrupt {
pub(crate) source_no: usize,
pub(crate) irq_no: usize,
}

impl Interrupt {
pub const fn new(source_no: usize, irq_no: usize) -> Self {
Self { source_no, irq_no }
}
}
2 changes: 2 additions & 0 deletions driver/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,9 @@

pub mod clock_control;
pub mod i2c;
pub mod interrupt_controller;
pub mod pinctrl;
pub mod reset;
pub mod static_ref;
pub mod systimer;
pub mod uart;
4 changes: 4 additions & 0 deletions driver/src/static_ref.rs
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,10 @@ impl<T> StaticRef<T> {
ptr: NonNull::new_unchecked(ptr.cast_mut()),
}
}

pub fn inner(&self) -> *const T {
self.ptr.as_ptr()
}
}

impl<T> Clone for StaticRef<T> {
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