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fix: correct assetion logic #122

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tisonkun merged 1 commit into from
May 11, 2026
+2 −2
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fix: correct assetion logic #122

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4 changes: 2 additions & 2 deletions datasketches/src/hll/array4.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -230,10 +230,10 @@ impl Array4 {
let mut new_aux = None;

for (slot, old_actual_val) in old_aux.into_iter() {
debug_assert_ne!(
debug_assert_eq!(
self.get_raw(slot),
AUX_TOKEN,
"AuxMap contains slow without AUX_TOKEN"
"AuxMap contains slot != AUX_TOKEN"
);

let new_shifted = old_actual_val - new_cur_min;
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