use bddisasm replace capstone

configure

@@ -411,6 +411,8 @@ latx_atomic="no"
 latx_xcomisx_opt="no"
 latx_avx_opt="no"
 capstone_diet="yes"
+bddisasm_no_mnemonic="yes"
+latx_decode_debug="no"
 latx_syscall_tunnel="no"
 latx_tbmini_enable="yes"
 cocoa="auto"
@@ -1095,6 +1097,7 @@ for opt do
       strip_opt="no"
       fortify_source="no"
       capstone_diet="no"
+      bddisasm_no_mnemonic="no"
   ;;
   --enable-sanitizers) sanitizers="yes"
   ;;
@@ -1259,6 +1262,10 @@ for opt do
   ;;
   --disable-capstone-diet) capstone_diet="no"
   ;;
+  --enable-decode-debug) latx_decode_debug="yes"
+  ;;
+  --disable-bddisasm-no-mnemonic) bddisasm_no_mnemonic="no"
+  ;;
   --enable-latx-syscall-tunnel) latx_syscall_tunnel="yes"
   ;;
   --enable-latx-tbmini) latx_tbmini_enable="yes"
@@ -5789,6 +5796,12 @@ if test "$latx" = "yes" ; then
   if test "$capstone_diet" = "yes" ; then
     echo "CONFIG_CAPSTONE_DIET=y" >> $config_host_mak
   fi
+  if test "$bddisasm_no_mnemonic" = "yes" ; then
+    echo "CONFIG_BDDISASM_NO_MNEMONIC=y" >> $config_host_mak
+  fi
+  if test "$latx_decode_debug" = "yes" ; then
+    echo "CONFIG_LATX_DECODE_DEBUG=y" >> $config_host_mak
+  fi
 fi
 if test "$ptrace_debug" = "yes" ; then
   echo "CONFIG_PTRACE_DEBUG=y" >> $config_host_mak

target/i386/latx/bddisasm/bddisasm.c

@@ -0,0 +1,104 @@
+#include "labddisasm.h"
+#include <assert.h>
+
+#include "capstone_git.h"
+
+int labddisasm_get_64(const uint8_t *code, size_t code_size,
+        struct _INSTRUX **insn,
+        int ir1_num, void *pir1_base)
+{
+    INSTRUX *ix;
+
+    if (pir1_base) {
+        uint64_t current_address =  (uint64_t)pir1_base +
+            // (ir1_num * IR1_INST_SIZE);
+            (ir1_num * sizeof(struct la_dt_insn));
+        ix = (void *)current_address;
+    } else {
+        // ix = malloc(IR1_INST_SIZE);
+        ix = malloc(sizeof(struct la_dt_insn));
+    }
+
+    NDSTATUS status = NdDecodeEx(ix, code, code_size, ND_CODE_64, ND_DATA_64);
+
+    if (!ND_SUCCESS(status))
+    {
+#ifdef CONFIG_LATX_DEBUG
+        fprintf(stderr, "%s: can't disasm code 0x%x at addr %p\n",
+            __func__, *(uint32_t *)code, code);
+#endif
+        *insn = NULL;
+        return -1;
+    } 
+
+    *insn = ix;
+
+    return 1;
+}
+
+int labddisasm_get_32(const uint8_t *code, size_t code_size,
+        struct _INSTRUX **insn,
+        int ir1_num, void *pir1_base)
+{
+    INSTRUX *ix;
+
+    if (pir1_base) {
+        uint64_t current_address =  (uint64_t)pir1_base +
+            // (ir1_num * IR1_INST_SIZE);
+            (ir1_num * sizeof(struct la_dt_insn));
+        ix = (void *)current_address;
+    } else {
+        // ix = malloc(IR1_INST_SIZE);
+        ix = malloc(sizeof(struct la_dt_insn));
+    }
+
+    NDSTATUS status = NdDecodeEx(ix, code, code_size, ND_CODE_32, ND_DATA_32);
+
+    if (!ND_SUCCESS(status))
+    {
+#ifdef CONFIG_LATX_DEBUG
+        fprintf(stderr, "%s: can't disasm code 0x%x at addr %p\n",
+            __func__, *(uint32_t *)code, code);
+#endif
+        *insn = NULL;
+        return -1;
+    } 
+
+    *insn = ix;
+
+    return 1;
+}
+
+int labddisasm_get_16(const uint8_t *code, size_t code_size,
+        struct _INSTRUX **insn,
+        int ir1_num, void *pir1_base)
+{
+    INSTRUX *ix;
+
+    if (pir1_base) {
+        uint64_t current_address =  (uint64_t)pir1_base +
+            // (ir1_num * IR1_INST_SIZE);
+            (ir1_num * sizeof(struct la_dt_insn));
+        ix = (void *)current_address;
+    } else {
+        // ix = malloc(IR1_INST_SIZE);
+        ix = malloc(sizeof(struct la_dt_insn));
+    }
+
+    NDSTATUS status = NdDecodeEx(ix, code, code_size, ND_CODE_16, ND_DATA_16);
+
+    if (!ND_SUCCESS(status))
+    {
+#ifdef CONFIG_LATX_DEBUG
+        fprintf(stderr, "%s: can't disasm code 0x%x at addr %p\n",
+            __func__, *(uint32_t *)code, code);
+        *insn = NULL;
+#endif
+        return -1;
+    } 
+
+    *insn = ix;
+
+    return 1;
+}
+

target/i386/latx/include/bddisasm/bddisasm.h

@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2020 Bitdefender
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef BDDISASM_H
+#define BDDISASM_H
+
+#include "bdx86_core.h"
+
+#endif // BDDISASM_H

target/i386/latx/include/bddisasm/bddisasm_status.h

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2020 Bitdefender
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef BDDISASM_STATUS_H
+#define BDDISASM_STATUS_H
+
+//
+// Return statuses.
+//
+typedef ND_UINT32 NDSTATUS;
+
+// Success codes are all < 0x80000000.
+#define ND_STATUS_SUCCESS                               0x00000000 // All good.
+
+// Hint/success codes.
+#define ND_STATUS_HINT_OPERAND_NOT_USED                 0x00000001
+
+// Error codes are all > 0x80000000.
+#define ND_STATUS_BUFFER_TOO_SMALL                      0x80000001 // The provided input buffer is too small.
+#define ND_STATUS_INVALID_ENCODING                      0x80000002 // Invalid encoding/instruction.
+#define ND_STATUS_INSTRUCTION_TOO_LONG                  0x80000003 // Instruction exceeds the maximum 15 bytes.
+#define ND_STATUS_INVALID_PREFIX_SEQUENCE               0x80000004 // Invalid prefix sequence is present.
+#define ND_STATUS_INVALID_REGISTER_IN_INSTRUCTION       0x80000005 // The instruction uses an invalid register.
+#define ND_STATUS_XOP_WITH_PREFIX                       0x80000006 // XOP is present, but also a legacy prefix.
+#define ND_STATUS_VEX_WITH_PREFIX                       0x80000007 // VEX is present, but also a legacy prefix.
+#define ND_STATUS_EVEX_WITH_PREFIX                      0x80000008 // EVEX is present, but also a legacy prefix.
+#define ND_STATUS_INVALID_ENCODING_IN_MODE              0x80000009 // Invalid encoding/instruction.
+#define ND_STATUS_BAD_LOCK_PREFIX                       0x8000000A // Invalid usage of LOCK.
+#define ND_STATUS_CS_LOAD                               0x8000000B // An attempt to load the CS register.
+#define ND_STATUS_66_NOT_ACCEPTED                       0x8000000C // 0x66 prefix is not accepted.
+#define ND_STATUS_16_BIT_ADDRESSING_NOT_SUPPORTED       0x8000000D // 16 bit addressing mode not supported.
+#define ND_STATUS_RIP_REL_ADDRESSING_NOT_SUPPORTED      0x8000000E // RIP-relative addressing not supported.
+
+// VEX/EVEX specific errors.
+#define ND_STATUS_VSIB_WITHOUT_SIB                      0x80000030 // Instruction uses VSIB, but SIB is not present.
+#define ND_STATUS_INVALID_VSIB_REGS                     0x80000031 // VSIB addressing, same vector reg used more than once.
+#define ND_STATUS_VEX_VVVV_MUST_BE_ZERO                 0x80000032 // VEX.VVVV field must be zero.
+#define ND_STATUS_MASK_NOT_SUPPORTED                    0x80000033 // Masking is not supported.
+#define ND_STATUS_MASK_REQUIRED                         0x80000034 // Masking is mandatory.
+#define ND_STATUS_ER_SAE_NOT_SUPPORTED                  0x80000035 // Embedded rounding/SAE not supported.
+#define ND_STATUS_ZEROING_NOT_SUPPORTED                 0x80000036 // Zeroing not supported.
+#define ND_STATUS_ZEROING_ON_MEMORY                     0x80000037 // Zeroing on memory.
+#define ND_STATUS_ZEROING_NO_MASK                       0x80000038 // Zeroing without masking.
+#define ND_STATUS_BROADCAST_NOT_SUPPORTED               0x80000039 // Broadcast not supported.
+#define ND_STATUS_BAD_EVEX_V_PRIME                      0x80000040 // EVEX.V' field must be one (negated 0).
+#define ND_STATUS_BAD_EVEX_LL                           0x80000041 // EVEX.L'L field is invalid for the instruction.
+#define ND_STATUS_SIBMEM_WITHOUT_SIB                    0x80000042 // Instruction uses SIBMEM, but SIB is not present.
+#define ND_STATUS_INVALID_TILE_REGS                     0x80000043 // Tile registers are not unique.
+#define ND_STATUS_INVALID_DEST_REGS                     0x80000044 // Destination register is not unique (used as src).
+#define ND_STATUS_INVALID_EVEX_BYTE3                    0x80000045 // EVEX payload byte 3 is invalid.
+#define ND_STATUS_BAD_EVEX_U                            0x80000046 // EVEX.U field is invalid.
+
+
+// Not encoding specific.
+#define ND_STATUS_INVALID_PARAMETER                     0x80000100 // An invalid parameter was provided.
+#define ND_STATUS_INVALID_INSTRUX                       0x80000101 // The INSTRUX contains unexpected values.
+#define ND_STATUS_BUFFER_OVERFLOW                       0x80000103 // Not enough space is available to format textual disasm.
+
+#define ND_STATUS_INTERNAL_ERROR                        0x80000200 // Internal error occurred.
+
+
+#define ND_SUCCESS(status)                              (status < 0x80000000)
+
+#endif // BDDISASM_STATUS_H

target/i386/latx/include/bddisasm/bddisasm_types.h

@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2020 Bitdefender
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef BDDISASM_TYPES_H
+#define BDDISASM_TYPES_H
+
+
+#if defined(_MSC_VER) || defined(__ICC) || defined(__INTEL_COMPILER)
+
+// Microsoft VC compiler.
+
+typedef unsigned __int8 ND_UINT8;
+typedef unsigned __int16 ND_UINT16;
+typedef unsigned __int32 ND_UINT32;
+typedef unsigned __int64 ND_UINT64;
+typedef signed __int8 ND_SINT8;
+typedef signed __int16 ND_SINT16;
+typedef signed __int32 ND_SINT32;
+typedef signed __int64 ND_SINT64;
+
+#elif defined(__GNUC__) || defined(__GNUG__) || defined(__clang__)
+
+// clang/GCC compiler.
+
+typedef __UINT8_TYPE__ ND_UINT8;
+typedef __UINT16_TYPE__ ND_UINT16;
+typedef __UINT32_TYPE__ ND_UINT32;
+typedef __UINT64_TYPE__ ND_UINT64;
+typedef __INT8_TYPE__ ND_SINT8;
+typedef __INT16_TYPE__ ND_SINT16;
+typedef __INT32_TYPE__ ND_SINT32;
+typedef __INT64_TYPE__ ND_SINT64;
+
+#else
+
+// other compilers, assume stdint is present.
+
+#include <stdint.h>
+
+typedef uint8_t ND_UINT8;
+typedef uint16_t ND_UINT16;
+typedef uint32_t ND_UINT32;
+typedef uint64_t ND_UINT64;
+typedef int8_t ND_SINT8;
+typedef int16_t ND_SINT16;
+typedef int32_t ND_SINT32;
+typedef int64_t ND_SINT64;
+
+#endif
+
+
+
+#if defined(_M_AMD64) || defined(__x86_64__)
+
+#define ND_ARCH_X64
+
+#elif defined(_M_IX86) || defined(__i386__)
+
+#define ND_ARCH_X86
+#define ND_ARCH_IA32
+
+#elif defined(_M_ARM64) || defined(__aarch64__)
+
+#define ND_ARCH_AARCH64
+#define ND_ARCH_A64
+
+#elif defined(_M_ARM) || defined(__arm__)
+
+#define ND_ARCH_ARM
+#define ND_ARCH_A32
+
+#else
+#define ND_ARCH_AARCH64
+#define ND_ARCH_A64
+//#error "Unknown architecture!"
+
+#endif
+
+
+// Handle architecture definitions.
+#if defined(ND_ARCH_X64) || defined(ND_ARCH_A64)
+
+typedef ND_UINT64 ND_SIZET;
+
+#elif defined(ND_ARCH_X86) || defined(ND_ARCH_A32)
+
+typedef ND_UINT32 ND_SIZET;
+
+#else
+
+#error "Unknown architecture!"
+
+#endif
+
+
+// Common definitions.
+typedef ND_UINT8 ND_BOOL;
+
+#if defined(__cplusplus)
+#define ND_NULL     nullptr
+#else
+#define ND_NULL     ((void *)(0))
+#endif
+#define ND_TRUE     (1)
+#define ND_FALSE    (0)
+
+
+#endif // BDDISASM_TYPES_H

target/i386/latx/include/bddisasm/bddisasm_version.h

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2020 Bitdefender
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef BDDISASM_VERSION_H
+#define BDDISASM_VERSION_H
+
+#define DISASM_VERSION_MAJOR        2
+#define DISASM_VERSION_MINOR        3
+#define DISASM_VERSION_REVISION     0
+
+#define SHEMU_VERSION_MAJOR         DISASM_VERSION_MAJOR
+#define SHEMU_VERSION_MINOR         DISASM_VERSION_MINOR
+#define SHEMU_VERSION_REVISION      DISASM_VERSION_REVISION
+
+#endif // BDDISASM_VERSION_H